Semiconductor device

Claim 2

A semiconductor device comprising: a semiconductor including at least a source and a drain of a first conductivity type with a high impurity concentration, a channel area of a second conductivity type opposite to said first conductivity type, an insulation layer provided between said source and drain and covering at least said channel area, and a gate electrode of a conductive material provided adjacent to said insulation layer, wherein (1) a first region of the first conductivity type with a low impurity concentration at least adjacent to said channel area and to said source and drain, (2) a second region of the second conductivity type adjacent to said first region, and (3) an additional region of the second conductivity type with an impurity concentration higher than the channel area is provided between said channel area and said first region, are provided, and said first region between said source and drain and said second region is occupied by a depletion region produced by a junction between said first and second regions.

Claim 3

A semiconductor device according to claim 1, further comprising: an additional source of the first conductivity type having an impurity concentration lower than that of said source, provided between said channel area and said source.

Claim 4

A semiconductor device according to claim 1, wherein the first conductivity type is n.

Claim 5

A semiconductor device according to claim 1, wherein the first conductivity type is p.

Claim 6

A semiconductor device according to claim 1, wherein a thickness of said channel area is less than a maximum depletion width extending from said insulating layer side.

Claim 7

A semiconductor device according to claim 1, wherein a thickness of said channel area is at least a maximum depletion width extending from said insulating layer side.

Claim 8

A semiconductor device according to claim 1, wherein said semiconductor includes mainly at least one element selected from a group comprising silicon, germanium, and gallium arsenide.

Claim 9

A semiconductor device according to claim 1, further comprising an additional drain of the first conductivity type having an impurity concentration lower than that of said drain, provided between said channel area and said drain.

Claim 10

A semiconductor integrated circuit including a semiconductor device, said semiconductor device comprising: a semiconductor including at least a source and a drain of a first conductivity type with a high impurity concentration, a channel area of a second conductivity type opposite to said first conductivity type, an insulation layer provided between said source and drain and covering at least said channel area, and a gate electrode of a conductive material provided adjacent to said insulation layer, wherein (1) a first region of the first conductivity type with a low impurity concentration at least adjacent to said channel area and to said source and drain, (2) a second region of the second conductivity type adjacent to said first region, and (3) an additional channel area of the same conductivity type as said channel area with an impurity concentration higher than the channel area is provided between said channel area and said first region, are provided, and said first region between said source and drain and said second region is occupied by a depletion region produced by a junction between said first and second regions.

Claim 11

A semiconductor integrated circuit including a semiconductor device, said semiconductor device comprising: a semiconductor including at least a source and a drain of a first conductivity type with a high impurity concentration, a channel area of a second conductivity type opposite to said first conductivity type, an insulation layer provided between said source and drain and covering at least said channel area, and a gate electrode of a conductive material provided adjacent to said insulation layer, wherein (1) a first region of the first conductivity type with a low impurity concentration at least adjacent to said channel area and to said source and drain, (2) a second region of the second conductivity type adjacent to said first region, and (3) an additional channel area of the same conductivity type as said channel area with an impurity concentration higher than the channel area is provided between said channel area and said first region, are provided, and said first region between said source and drain and said second region is occupied by a depletion region produced by a junction between said first and second regions.

Claim 12

A semiconductor integrated circuit according to claim 9, further comprising: an additional source of the first conductivity type having an impurity concentration lower than that of said source, provided between said channel area and said source.

Claim 13

A semiconductor integrated circuit according to claim 9, further comprising an additional drain of the first conductivity type having an impurity concentration lower than that of said drain, provided between said channel area and said drain.

Claim 14

A semiconductor device comprising: a semiconductor at least provided with a source and a drain of a first conductivity type with a high impurity concentration, a channel region of a second conductivity type opposite to the first conductivity type comprising a first channel area at a surface side and a second channel area including an impurity at a concentration lower than the first channel area; an insulating layer provided between said source and drain and covering at least said first channel area; and a gate electrode of a conductive material provided adjacent to said insulating layer, wherein a first region of the first conductivity type adjacent to said second channel area is provided, and a depletion region extending from a junction between said second channel area and said first region reaches said source and drain.

Claim 15

A semiconductor device comprising: a semiconductor at least provided with a source and a drain of a first conductivity type with a high impurity concentration, a channel region of a second conductivity type opposite to the first conductivity type comprising a first channel area at a surface side and a second channel area including an impurity at a concentration lower than the first channel area; an insulating layer provided between said source and drain and covering at least said first channel area; and a gate electrode of a conductive material provided adjacent to said insulating layer, wherein a first region of the first conductivity type adjacent to said second channel area is provided, and a depletion region extending from a junction between said second channel area and said first region reaches said source and drain.

Claim 16

A semiconductor device according to claim 12, wherein an impurity concentration in said first region is less than that in said source and drain.

Claim 17

A semiconductor device acording to claim 12, wherein both of said first and second channel areas are adjacent respectively to said source and drain.

Claim 18

A semiconductor device according to claim 12, wherein said first channel area is provided between said source and drain, and said second channel area is provided under said source and drain.