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US5581739A Expired / Lapsed US ⏱️ 0.0 years remaining

Two lane computing systems

Assignee: Smiths Group PLC
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Filing: 1994-07-26
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Granted: 1996-12-03
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Expires: 2014-07-26
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Abstract

Abstract A dual lane computing system has at least one processor in each lane, each processor having an associated store which stores input data supplied to the processor and their time of arrival. The lanes produce nominally-identical outputs which are supplied to a comparator that detects when there is a discrepancy between the lanes. When a discrepancy is detected, an external processor is loaded with software that simulates the operation of the lanes. The data in the store associated with one of the lane processors is supplied to the simulator processor in respect of the input just prior to the detection of the discrepancy. The simulator simulates the operation of one lane utilizing this data and its output is compared in the comparator with the actual output of that lane as recorded when the discrepancy occurred.

Inventors

  • 👤 Roger S. Fitzpatrick

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 18:04
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/1629; G06F11/1641; G06F11/165; G06F11/18; G06F11/183; G06F11/184; G06F11/20; G06F11/202; G06F11/2023

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 220 words
A computing system comprising: two lanes, each lane having at least one processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated with each said processing means, said store means being arranged to store input data supplied to its respective processing means and to re-inject input data to its respective processing means if the system should be restarted following an interruption to the system; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; and means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane.
Claim 2
Dependent Claim 220 words
A computing system comprising: two lanes, each lane having at least one processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated with each said processing means, said store means being arranged to store input data supplied to its respective processing means and to re-inject input data to its respective processing means if the system should be restarted following an interruption to the system; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; and means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane.
Claim 3
Dependent Claim 242 words
A computing system comprising: two lanes, each lane having at least one processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated with each said processing means, said store means being arranged to store input data supplied to its respective processing means; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane; a software store of software simulating the operation of the lanes, the software store being separate from the simulator means, and means for loading the contents of the software store into the simulator means only on detection of a discrepancy between the two lane outputs.
Claim 4
Dependent Claim 242 words
A computing system comprising: two lanes, each lane having at least one processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated with each said processing means, said store means being arranged to store input data supplied to its respective processing means; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane; a software store of software simulating the operation of the lanes, the software store being separate from the simulator means, and means for loading the contents of the software store into the simulator means only on detection of a discrepancy between the two lane outputs.
Claim 5
Dependent Claim 252 words
A computing system comprising: two lanes, each lane having at least two processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated respectively with each said processing means, each of said store means being arranged to store input data supplied to its respective processing means; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; and means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane; the simulator means being operative to simulate operation of a first of the processing means in a lane and supply an output to a second of the processing means in that lane instead of the output from said first processing means on detection of a fault in the first processing means.
Claim 6
Dependent Claim 252 words
A computing system comprising: two lanes, each lane having at least two processing means, the lanes being arranged to produce respective, nominally-identical outputs; means for supplying input data to each lane; means for detecting a discrepancy between said outputs and signalling a fault; store means associated respectively with each said processing means, each of said store means being arranged to store input data supplied to its respective processing means; simulator means for simulating operation of said processing means of one of the lanes on detection of a discrepancy between the outputs from said lanes; means for supplying the simulator means with said input data stored in said store means of one of the lanes which was supplied to its associated processing means just prior to the detection of a discrepancy, said simulator means being arranged to simulate the operation of the processing means of said one lane utilizing the data from said store means supplied to the store means just prior to detection of the discrepancy; and means for comparing an output of the simulator means with the outputs of the lanes produced on detection of the discrepancy so as thereby to identify which of said lanes is a malfunctioning lane; the simulator means being operative to simulate operation of a first of the processing means in a lane and supply an output to a second of the processing means in that lane instead of the output from said first processing means on detection of a fault in the first processing means.
Claim 7
Dependent Claim 24 words
A computing system according to claim 1, wherein the simulator means is also arranged to simulate operation of the second of the processing means.
Claim 8
Dependent Claim 49 words
A computing system according to claim 4, wherein the simulator means is arranged to perform two simulations of the second processing means one of which utilizes the output from the first processing means and the other of which utilizes the output produced by simulation of the first processing means.

References Cited (Backward Citations)

US4306286A Cited
US4283720A Cited
US4370706A Cited
US4423594A Cited
US4725975A Cited
WO1987000316A2 Cited
US4703481A Cited
US4775976A Cited
US4763289A Cited
US4967347A Cited
EP0271807A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-03 2000-06-03 2000-12-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-03 2004-06-03 2004-12-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-03 2008-06-03 2008-12-03 $7700.00 Window Closed / Lapsed

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