US5581584A
Expired / Lapsed
US
⏱️ 0.0 years remaining
PLL circuit
Assignee: Murata Manufacturing Co Ltd
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Filing: 1994-07-20
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Granted: 1996-12-03
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Expires: 2014-07-20
Abstract
Abstract A PLL circuit includes a PLLic formed into an integrated circuit; a loop filter for receiving an output signal from the PLLic; a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of the loop filter for applying a controlled oscillation output signal to the PLLic, the voltage-controlled oscillator including a resonator and a negative resistor circuit; wherein a buffer amplifier functioning as a part of the voltage-controlled oscillator is incorporated into the PLLic, and the resonator and the negative resistor circuit of the voltage-controlled oscillator are disposed outside of the PLLic.
Inventors
- 👤 Atsushi Inoue
- 👤 Toshio Hata
- 👤 Osamu Tamakoshi
- 👤 Takayasu Komaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 01:57
CPC Classifications
H; H03; H03B; H03B7/00; H03B7/02; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03B2201/00; H03B2201/02; H03B7/06
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
113 words
A phase-locked loop circuit, comprising: a phase-locked loop integrated circuit adapted for having a reference frequency inputted thereto, said phase-locked loop integrated circuit having a buffer amplifier physically incorporated therein; a loop filter for receiving an output signal from said phase-locked loop integrated circuit; a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of said loop filter for supplying a controlled oscillation output signal, said voltage-controlled oscillator including a resonator, a negative resistor circuit, and said buffer amplifier in said phase-locked loop integrated circuit, said voltage-controlled oscillator supplying said controlled oscillation output signal to further components in said phase-locked loop integrated circuit downstream from said buffer amplifier.
Claim 2
Dependent Claim
113 words
A phase-locked loop circuit, comprising: a phase-locked loop integrated circuit adapted for having a reference frequency inputted thereto, said phase-locked loop integrated circuit having a buffer amplifier physically incorporated therein; a loop filter for receiving an output signal from said phase-locked loop integrated circuit; a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of said loop filter for supplying a controlled oscillation output signal, said voltage-controlled oscillator including a resonator, a negative resistor circuit, and said buffer amplifier in said phase-locked loop integrated circuit, said voltage-controlled oscillator supplying said controlled oscillation output signal to further components in said phase-locked loop integrated circuit downstream from said buffer amplifier.
Claim 3
Dependent Claim
37 words
A phase-locked loop circuit as claimed in claim 1, further comprising an impedance matching circuit for optimizing an output level of said buffer amplifier, said impedance matching circuit being physically incorporated into said phase-locked loop integrated circuit.
Claim 4
Dependent Claim
39 words
A phase-locked loop circuit as claimed in claim 1, further comprising an impedance matching circuit disposed outside of said phase-locked loop integrated circuit for optimizing an output level of said buffer amplifier incorporated into said phase-locked loop integrated circuit.
Claim 5
Dependent Claim
26 words
A phase-locked loop circuit as claimed in claim 1, wherein said buffer amplifier comprises a plurality of individual buffer amplifiers connected in series with each other.
Claim 6
Dependent Claim
17 words
A phase-locked loop circuit as claimed in claim 1, wherein said loop filter comprises a low-pass filter.
Claim 7
Dependent Claim
23 words
A phase-locked loop circuit as claimed in claim 4, wherein said plurality of individual buffer amplifiers is a pair of individual buffer amplifiers.
Claim 8
Dependent Claim
112 words
In a phase-locked loop circuit, comprising: a phase-locked loop integrated circuit adapted for having a reference frequency inputted thereto; a loop filter for receiving an output signal from said phase-locked loop integrated circuit; and a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of said loop filter for supplying a controlled oscillation output signal, said voltage-controlled oscillator including a resonator, a negative resistor circuit, and a buffer amplifier; the improvement comprising: said phase-locked loop integrated circuit having said buffer amplifier physically incorporated therein; said voltage-controlled oscillator supplying said controlled oscillation output signal to further components in said phase-locked loop integrated circuit downstream from said buffer amplifier.
Claim 9
Dependent Claim
112 words
In a phase-locked loop circuit, comprising: a phase-locked loop integrated circuit adapted for having a reference frequency inputted thereto; a loop filter for receiving an output signal from said phase-locked loop integrated circuit; and a voltage-controlled oscillator having an oscillation frequency which is controlled according to an output signal of said loop filter for supplying a controlled oscillation output signal, said voltage-controlled oscillator including a resonator, a negative resistor circuit, and a buffer amplifier; the improvement comprising: said phase-locked loop integrated circuit having said buffer amplifier physically incorporated therein; said voltage-controlled oscillator supplying said controlled oscillation output signal to further components in said phase-locked loop integrated circuit downstream from said buffer amplifier.
Claim 10
Dependent Claim
37 words
A phase-locked loop circuit as claimed in claim 7, further comprising an impedance matching circuit for optimizing an output level of said buffer amplifier, said impedance matching circuit being physically incorporated into said phase-locked loop integrated circuit.
Claim 11
Dependent Claim
39 words
A phase-locked loop circuit as claimed in claim 7, further comprising an impedance matching circuit disposed outside of said phase-locked loop integrated circuit for optimizing an output level of said buffer amplifier incorporated into said phase-locked loop integrated circuit.
Claim 12
Dependent Claim
26 words
A phase-locked loop circuit as claimed in claim 7, wherein said buffer amplifier comprises a plurality of individual buffer amplifiers connected in series with each other.
Claim 13
Dependent Claim
23 words
A phase-locked loop circuit as claimed in claim 10, wherein said plurality of individual buffer amplifiers is a pair of individual buffer amplifiers.
Claim 14
Dependent Claim
17 words
A phase-locked loop circuit as claimed in claim 7, wherein said loop filter comprises a low-pass filter.
References Cited (Backward Citations)
US5218325A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-03 | 2000-06-03 | 2000-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-03 | 2004-06-03 | 2004-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-03 | 2008-06-03 | 2008-12-03 | $7700.00 | Window Closed / Lapsed |