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US5581302A Expired / Lapsed US ⏱️ 0.0 years remaining

Subsampled frame storage technique for reduced memory size

Assignee: National Semiconductor Corp
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Filing: 1995-05-30
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Granted: 1996-12-03
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Expires: 2015-05-30
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Abstract

Abstract A video compression system in accordance with the present invention may use a frame buffer which is only a fraction of the size of a full frame buffer. A subsampler connected to an input of the frame buffer performs 4 to 1 subsampling on the video data to be stored in the frame buffer. This allows the frame buffer to be one-fourth the size of a full frame buffer. The subsampling may even be 9 to 1, 16 to 1, or another ratio, for a concomitant decrease in frame buffer size. An upsampler is connected to the output of the frame buffer for providing interpolated and filtered values between the subsamples. Novel methods of filtering and interpolating performed by the upsampler are described. A new motion estimation technique is also described herein which directly detects the number of bits required to be transmitted to convey the difference between the predicted video data and the current video data, where a fewer number of bits used to convey the difference corresponds to better motion estimation. The search criterion for the best estimate of movement of a block is the minimum number of bits for conveying this difference.

Inventors

  • 👤 Xiaonong Ran
  • 👤 Michael Van Scherrenburg

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 18:00
CPC Classifications
G; G06; G06T; G06T3/00; G06T3/40; G06T3/4007; H; H04; H04N; H04N19/00; H04N19/10; H04N19/102; H04N19/103; H04N19/105; H04N19/134; H04N19/146; H04N19/149; H04N19/169; H04N19/17; H04N19/176; H04N19/42; H04N19/423; H04N19/426; H04N19/428; H04N19/50; H04N19/503; H04N19/51; H04N19/567; H04N19/59; H04N19/60; H04N19/61; H04N19/80; H04N19/82

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 122 words
A circuit for generating compressed video data comprising: a subtractor having a first input connected to a source of video data from a first frame and having a second input connected to a output of an upsampler, said output of said upsampler providing video data from a previous frame, an output of said subtractor providing a difference signal; an adder having a first input connected to said output of said upsampler and having a second input connected to receive a signal corresponding to said difference signal; a subsampler having an input connected to an output of said adder; and a memory having an input connected to an output of said subsampler and having an output connected to an input of said upsampler.
Claim 2
Dependent Claim 122 words
A circuit for generating compressed video data comprising: a subtractor having a first input connected to a source of video data from a first frame and having a second input connected to a output of an upsampler, said output of said upsampler providing video data from a previous frame, an output of said subtractor providing a difference signal; an adder having a first input connected to said output of said upsampler and having a second input connected to receive a signal corresponding to said difference signal; a subsampler having an input connected to an output of said adder; and a memory having an input connected to an output of said subsampler and having an output connected to an input of said upsampler.
Claim 3
Dependent Claim 36 words
The circuit of claim 1 wherein said subsampler subsamples at a 4 to 1 ratio to output an amount of data for said first frame approximately equal to one-quarter of that data in said first frame.
Claim 4
Dependent Claim 36 words
The circuit of claim 1 wherein said subsampler subsamples at a 9 to 1 ratio to output an amount of data for said first frame approximately equal to one-ninth of that data in said first frame.
Claim 5
Dependent Claim 124 words
The circuit of claim 1 further comprising: a motion estimator connected to said output of said subtractor, said motion estimator comprising: a converter for converting a difference value corresponding to said output of said subtractor to a number of bits required to be transmitted in order to convey said difference value; a detector for receiving said number of bits required to convey said difference value and for determining whether said number is the fewest number of bits detected for conveying said difference value; and a motion vector generator for motion compensating said video data from said previous frame for application to said substractor and for generating for transmission the motion vector which resulted in said difference value corresponding to said fewest number of bits.
Claim 6
Dependent Claim 19 words
The circuit of claim 1 wherein said upsampler generates interpolated video data based upon an output of said memory.
Claim 7
Dependent Claim 44 words
The circuit of claim 5 wherein said upsampler also provides low pass filtering of video data output from said memory only in the event that movement of an image represented by said video data is detected between said previous frame and said first frame.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-03 2000-06-03 2000-12-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-03 2004-06-03 2004-12-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-03 2008-06-03 2008-12-03 $7700.00 Window Closed / Lapsed

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