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US5580826A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for forming a planarized interlayer insulating film in a semiconductor device using a periodic resist pattern

Assignee: NEC Corp
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Filing: 1994-11-17
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Granted: 1996-12-03
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Expires: 2014-11-17
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Abstract

Abstract In a process for manufacturing a semiconductor device, on a surface including interconnections selectively formed on an insulating film, an interlayer insulating film to have a thickness thicker than that of the interconnections is deposited. A positive type photoresist is deposited, and then, exposed through a mask having a regular stripe pattern extending over the whole of the mask, while causing an exposing light to focus on a low altitude region of the interlayer insulating film. The photoresist is developed, with the result that a regular pattern of the developed photoresist is formed on only a low altitude region. A second resist is deposited on a surface including the first resist so as to cause the second resist to have a substantially planarized surface. Then, an etch-back is performed for a whole surface at least until a surface of the low altitude region of the interlayer insulating film is exposed, whereby an upper surface of the interlayer insulating film is planarized.

Inventors

  • 👤 Yoshihisa Matsubara
  • 👤 Shinya Ito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 01:51
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092; H10P95/00; H10P95/06; H10P95/062

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 129 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film having a thickness greater than that of said interconnections, said interlayer insulating film forming a high altitude region over said interconnections, and a low altitude region over said insulating film; depositing a photosensitive film on said interlayer insulating film; exposing said photosensitive film, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region; and developing said photosensitive film so that said periodic pattern of said mask is formed on said photosensitive film only in said low altitude region.
Claim 2
Dependent Claim 129 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film having a thickness greater than that of said interconnections, said interlayer insulating film forming a high altitude region over said interconnections, and a low altitude region over said insulating film; depositing a photosensitive film on said interlayer insulating film; exposing said photosensitive film, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region; and developing said photosensitive film so that said periodic pattern of said mask is formed on said photosensitive film only in said low altitude region.
Claim 3
Dependent Claim 77 words
A process claimed in claim 1 further including the steps of: depositing a resist film on said periodic pattern of said photosensitive film and said interlayer insulating film so as to cause said resist film to have a substantially planarized surface; and performing an etch-back of said resist film at least until a surface of said interlayer insulating film in said low altitude region is exposed, whereby an upper surface of said interlayer insulating film is planarized.
Claim 4
Dependent Claim 24 words
A process claimed in claim 1 wherein said periodic pattern of said mask comprises a stripe pattern extending over the entirety of said mask.
Claim 5
Dependent Claim 159 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate: depositing, over said insulating film and said interconnections, an interlayer insulating film having a thickness greater than that of said interconnection, said interlayer insulating film forming a high altitude region over said interconnections, and a low altitude region over said insulating film; depositing a photosensitive film on the surface of said interlayer insulating film; exposing said photosensitive film, through a mask having a periodic pattern extending over the whole of said mask, while causing an exposing light to be focused on said low altitude region, wherein said periodic pattern of said mask comprises a grille pattern having discrete rectangular openings arranged orthogonal to each other extending over the entirety of said mask; and developing said photosensitive film so that said periodic pattern of said mask is formed on said photosensitive film only in said low altitude region.
Claim 6
Dependent Claim 159 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate: depositing, over said insulating film and said interconnections, an interlayer insulating film having a thickness greater than that of said interconnection, said interlayer insulating film forming a high altitude region over said interconnections, and a low altitude region over said insulating film; depositing a photosensitive film on the surface of said interlayer insulating film; exposing said photosensitive film, through a mask having a periodic pattern extending over the whole of said mask, while causing an exposing light to be focused on said low altitude region, wherein said periodic pattern of said mask comprises a grille pattern having discrete rectangular openings arranged orthogonal to each other extending over the entirety of said mask; and developing said photosensitive film so that said periodic pattern of said mask is formed on said photosensitive film only in said low altitude region.
Claim 7
Dependent Claim 28 words
A process claimed in claim 1 wherein said periodic pattern of said photosensitive film has a pattern film width which is greater than a space between adjacent patterns.
Claim 8
Dependent Claim 25 words
A process claimed in claim 1 wherein said periodic pattern of said mask has a pattern which runs parallel over an outline of said interconnections.
Claim 9
Dependent Claim 25 words
A process claimed in claim 1 wherein said periodic pattern of said mask has a pattern which runs non-parallel over an outline of said interconnections.
Claim 10
Dependent Claim 130 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film, said interlayer insulating film over said interconnections forming a high altitude region and said interlayer insulating film over said insulating film forming a low altitude region; depositing a photosensitive polyimide layer over said interlayer insulating film; exposing said photosensitive polyimide layer, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region; and developing said photosensitive polyimide layer so that said periodic pattern is formed in said photosensitive polyimide on only said low altitude region of said interlayer insulating film.
Claim 11
Dependent Claim 130 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film, said interlayer insulating film over said interconnections forming a high altitude region and said interlayer insulating film over said insulating film forming a low altitude region; depositing a photosensitive polyimide layer over said interlayer insulating film; exposing said photosensitive polyimide layer, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region; and developing said photosensitive polyimide layer so that said periodic pattern is formed in said photosensitive polyimide on only said low altitude region of said interlayer insulating film.
Claim 12
Dependent Claim 40 words
A process claimed in claim 8 further including a step of depositing a second polyimide layer on said periodic pattern of said photosensitive polyimide layer so as to cause said second photosensitive polyimide layer to have a substantially planarized surface.
Claim 13
Dependent Claim 24 words
A process claimed in claim 8 wherein said periodic pattern of said mask comprises a stripe pattern extending over the whole of said mask.
Claim 14
Dependent Claim 157 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film, said interlayer insulating film over said interconnections forming a high altitude region and said interlayer insulating film over said insulating film forming a low altitude region; depositing a photosensitive polyimide layer over said interlayer insulating film; exposing said photosensitive polyimide layer, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region, wherein said periodic pattern of said mask comprises a grille pattern having discrete rectangular openings arranged orthogonal to each other extending over the entirety of said mask; and developing said photosensitive polyimide layer so that said periodic pattern is formed in said photosensitive polyimide on only said low altitude region of said interlayer insulating film.
Claim 15
Dependent Claim 157 words
A process for manufacturing a semiconductor device, including the steps: selectively forming interconnections on an insulating film formed on a semiconductor substrate; depositing, over said insulating film and said interconnections, an interlayer insulating film, said interlayer insulating film over said interconnections forming a high altitude region and said interlayer insulating film over said insulating film forming a low altitude region; depositing a photosensitive polyimide layer over said interlayer insulating film; exposing said photosensitive polyimide layer, through a mask having a periodic pattern extending over an entirety of said mask, while causing an exposing light to be focused on said low altitude region, wherein said periodic pattern of said mask comprises a grille pattern having discrete rectangular openings arranged orthogonal to each other extending over the entirety of said mask; and developing said photosensitive polyimide layer so that said periodic pattern is formed in said photosensitive polyimide on only said low altitude region of said interlayer insulating film.
Claim 16
Dependent Claim 24 words
A process claimed in claim 8 wherein said periodic pattern has a pattern film width which is greater than a space between adjacent patterns.
Claim 17
Dependent Claim 25 words
A process claimed in claim 8 wherein said periodic pattern of said mask has a pattern which runs parallel over an outline of said interconnections.
Claim 18
Dependent Claim 25 words
A process claimed in claim 8 wherein said periodic pattern of said mask has a pattern which runs non-parallel over an outline of said interconnections.

References Cited (Backward Citations)

JPS60245229A Cited
JPS61287245A Cited
JPH02271617A Cited
US5212114A Cited
US5077234A Cited
US5292689A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-12-03 2000-06-03 2000-12-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-12-03 2004-06-03 2004-12-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-12-03 2008-06-03 2008-12-03 $7700.00 Window Closed / Lapsed

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