Bidirectional transreceiver for high speed data system

Claim 2

A transceiver circuit connecting a fiber optic medium and a short data link comprising a first and second twisted pair of conductors in a high speed fiber optic data transmission network for simultaneously receiving and transmitting data over respectively said first and second twisted pair of conductors comprising: a transmitter section for supplying an intermediate transmitted data signal; a first equalizing means for receiving said intermediate transmitted data signal and providing an equalized transmitted data signal; first balancing means for receiving said equalized transmitted data signal and for providing a first differential voltage signal to said first twisted pair; second balancing means for receiving a second differential voltage signal transmitted over said second twisted pair and providing a first output having a reference voltage and a second output having an intermediate received data signal; a high speed subtracting circuit receiving said first output and said second output and providing a received data signal characteristic of said second differential voltage signal; and a second equalizing means for receiving said received data signal from said subtracting circuit and providing an equalized received data signal.

Claim 3

The transceiver circuit of claim 1 further comprising a first resistor for receiving said equalized transmitted data signal and providing an impedance substantially the same as the impedance of said first twisted pair to said first balancing means.

Claim 4

The transceiver circuit of claim 2 further comprising second and third resistors coupled with said second balancing means output for providing a terminating impedance substantially the same as the impedance of said second twisted pair to said balancing means.

Claim 5

The transceiver circuit of claim 3 wherein said first balancing means comprises a first transformer.

Claim 6

The transceiver circuit of claim 4 wherein said second balancing means comprises a second transformer.

Claim 7

The transceiver circuit of claim 1 wherein said high speed subtracting circuit comprises a single stage transistor.

Claim 8

A pair of transceiver circuits for providing a link between a data unit and a fiber optic medium via a first and second twisted pair of conductors in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over said first and second twisted pair of conductors comprising: first transmitter circuit means coupled with the fiber optic medium for supplying a first intermediate transmitted data signal; first equalizing means for receiving said first intermediate transmitted data signal and providing a first equalized transmitted data signal; first balancing means for receiving said first equalized transmitted data signal and for providing a first differential voltage signal to said first twisted pair of conductors; second balancing means for receiving a second differential voltage signal transmitted over said second twisted pair of conductors and providing a first output having a first reference voltage and a second output having a first intermediate received data signal; first high speed subtracting circuit receiving said first output and said second output and providing a first received data signal characteristic of said first balanced data signal; second equalizing means for receiving said first received data signal from said first subtracting circuit and providing a first equalized received data signal; second transmitter circuit means coupled with the data unit for receiving data therefrom and for supplying a second intermediate transmitted data signal; third equalizing means for receiving said second intermediate transmitted data signal and providing a second equalized transmitted data signal; third balancing means for receiving said third equalized transmitted data signal and for providing a second balanced data signal to said second twisted pair of conductors; fourth balancing means for receiving said second balanced data signal transmitted over said second twisted pair of conductors and providing a third output having a second reference voltage and a fourth output having a second intermediate received data signal; second high speed subtracting circuit receiving said third output and said fourth output and providing a second received data signal characteristic of said second balanced data signal; and fourth equalizing means for receiving said second received data signal from said second subtracting circuit and providing a second equalized received data signal.

Claim 9

A pair of transceiver circuits for providing a link between a data unit and a fiber optic medium via a first and second twisted pair of conductors in a high speed fiber optic data transmission network and for simultaneously receiving and transmitting data over said first and second twisted pair of conductors comprising: first transmitter circuit means coupled with the fiber optic medium for supplying a first intermediate transmitted data signal; first equalizing means for receiving said first intermediate transmitted data signal and providing a first equalized transmitted data signal; first balancing means for receiving said first equalized transmitted data signal and for providing a first differential voltage signal to said first twisted pair of conductors; second balancing means for receiving a second differential voltage signal transmitted over said second twisted pair of conductors and providing a first output having a first reference voltage and a second output having a first intermediate received data signal; first high speed subtracting circuit receiving said first output and said second output and providing a first received data signal characteristic of said first balanced data signal; second equalizing means for receiving said first received data signal from said first subtracting circuit and providing a first equalized received data signal; second transmitter circuit means coupled with the data unit for receiving data therefrom and for supplying a second intermediate transmitted data signal; third equalizing means for receiving said second intermediate transmitted data signal and providing a second equalized transmitted data signal; third balancing means for receiving said third equalized transmitted data signal and for providing a second balanced data signal to said second twisted pair of conductors; fourth balancing means for receiving said second balanced data signal transmitted over said second twisted pair of conductors and providing a third output having a second reference voltage and a fourth output having a second intermediate received data signal; second high speed subtracting circuit receiving said third output and said fourth output and providing a second received data signal characteristic of said second balanced data signal; and fourth equalizing means for receiving said second received data signal from said second subtracting circuit and providing a second equalized received data signal.