Playback clock signal generating circuit which uses a first and second phase lock loop

Claim 1

A playback clock signal generating circuit of a disk recording and reproducing apparatus for generating a playback clock signal in accordance with a head position information and reproduced data signal, comprising: a first phase-locked loop for outputting a first signal having a variable frequency in a predetermined frequency step depending on the head position information, wherein said first phase-locked loop includes a first voltage-controlled oscillator for outputting said first signal, a variable frequency divider for varying a frequency-dividing number depending on said head position information and frequency-dividing said first signal with the varied frequency-dividing number, a reference oscillator for outputting a reference signal having a frequency equal to said predetermined frequency step, a first phase comparator responsive to an output signal from said variable frequency divider and said reference signal, for detecting the phase difference therebetween, and a first low-pass filter connected between said first phase comparator and said first voltage-controlled oscillator; and a second phase-locked loop for outputting a playback clock signal in response to the reproduced data signal and said first signal wherein said second phase-locked loop includes a second voltage-controlled oscillator for outputting a second signal, a mixer for frequency-converting said second signal with said first signal to output said playback clock signal, a second phase comparator responsive to the reproduced data signal and the playback clock signal outputted from said mixer, and a second low-pass filter connected between said second phase comparator and said second voltage-controlled oscillator.