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Patent US5572716A successfully refreshed from Google Patents.
US5572716A
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Method and apparatus for determining time-related operating parameters for computers
Assignee: MICROID RESEARCH Inc
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Filing: 1994-03-25
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Granted: 1996-11-05
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Expires: 2014-03-25
Abstract
Abstract A basic input output system for a general-purpose computer provides a method for determining the oscillator frequency and setting system timing parameters by selecting a reference device and measuring the time necessary for performing a set number of operations of the reference device. Methods are disclosed for computer systems having fixed wait-state bus cycles and for systems having programmable wait-state bus cycles. The invention has particular applicability to Systems having CPU microprocessors that allow external selection of microprocessor-to-input oscillator frequency ratio. In such systems identification of the CPU microprocessor and its operating frequency is not enough information to set timing parameters for optimum performance. A BIOS and a general-purpose computer are provided in combination with the methods of the invention.
Inventors
- 👤 Michael G. Meisner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 04:40
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/04; G06F1/08
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
145 words
A method for determining input oscillator frequency for a computer having a CPU microprocessor and a communication bus with a bus cycle composed of X bus CLKs, comprising the steps of: (a) identifying a frequency ratio R between the input oscillator and the bus; (b) selecting a microprocessor-independent reference device connected to the bus; (c) measuring elapsed time for a pre-programmed number of operations of the reference device using a timing reference independent of the input oscillator, each operation requiring X bus CLKs; (d) calculating the period for a single bus CLK by dividing the elapsed time by the pre-programmed number of operations and by X; (e) calculating the operating frequency of the bus by taking the inverse of the period for a single bus CLK; and (f) determining the frequency of the input oscillator by multiplying the operating frequency of the bus by R.
Claim 2
Independent Claim
145 words
A method for determining input oscillator frequency for a computer having a CPU microprocessor and a communication bus with a bus cycle composed of X bus CLKs, comprising the steps of: (a) identifying a frequency ratio R between the input oscillator and the bus; (b) selecting a microprocessor-independent reference device connected to the bus; (c) measuring elapsed time for a pre-programmed number of operations of the reference device using a timing reference independent of the input oscillator, each operation requiring X bus CLKs; (d) calculating the period for a single bus CLK by dividing the elapsed time by the pre-programmed number of operations and by X; (e) calculating the operating frequency of the bus by taking the inverse of the period for a single bus CLK; and (f) determining the frequency of the input oscillator by multiplying the operating frequency of the bus by R.
Claim 3
Dependent Claim
15 words
The method of claim 1 wherein R selected is the highest ratio available for selection.
Claim 4
Dependent Claim
13 words
The method of claim 1 wherein the bus is an industry-standard AT bus.
Claim 5
Dependent Claim
22 words
The method of claim 1 further comprising a step for setting timing parameters for the computer based on the input oscillator frequency.
Claim 6
Dependent Claim
15 words
The method of claim 1 wherein the reference device is a direct memory access controller.
Claim 7
Dependent Claim
32 words
The method of claim 1 wherein, at step (c) operations are counted for the reference device for a pre-programmed elapsed time rather than measuring elapsed time for a pre-programmed number of operations.
Claim 8
Dependent Claim
52 words
The method of claim 1 wherein the reference device is a microprocessor-dependent device, requiring interaction with the microprocessor for each operation of the reference device, and the method includes steps for determining the microprocessor period and computing and subtracting the microprocessor overhead from the elapsed time in determining the bus CLK period.
Claim 9
Independent Claim
194 words
A method for determining input oscillator frequency for a computer having a CPU microprocessor, a communication bus, and programmable wait states, comprising the steps of: (a) selecting a frequency ratio R between the input oscillator and the bus to drive the bus; (b) selecting a reference device connected to the bus; (c) selecting a first one of the programmable wait states wherein one bus cycle=X bus CLKs; (d) measuring elapsed time t 1 for a pre-programmed number N operations of the reference device, yielding a first equation t 1 =N*X*bus CLK period+overhead (e) selecting a second one of the programmable wait states wherein one bus cycle=Y bus CLKs; (f) measuring elapsed time t 2 for N operations of the reference device, yielding a second equation t 2 =N*Y*bus CLK period+overhead; (g) subtracting algebraically the second equation from the first equation, yielding a third equation wherein bus CLK period=(t 1 -t 2 )/'N(X-Y)] (h) solving the third equation for the bus CLK period; (i) determining the bus CLK frequency by taking the inverse of the bus CLK period; and (j) determining the frequency of the input oscillator by multiplying the bus CLK frequency by R.
Claim 10
Independent Claim
194 words
A method for determining input oscillator frequency for a computer having a CPU microprocessor, a communication bus, and programmable wait states, comprising the steps of: (a) selecting a frequency ratio R between the input oscillator and the bus to drive the bus; (b) selecting a reference device connected to the bus; (c) selecting a first one of the programmable wait states wherein one bus cycle=X bus CLKs; (d) measuring elapsed time t 1 for a pre-programmed number N operations of the reference device, yielding a first equation t 1 =N*X*bus CLK period+overhead (e) selecting a second one of the programmable wait states wherein one bus cycle=Y bus CLKs; (f) measuring elapsed time t 2 for N operations of the reference device, yielding a second equation t 2 =N*Y*bus CLK period+overhead; (g) subtracting algebraically the second equation from the first equation, yielding a third equation wherein bus CLK period=(t 1 -t 2 )/'N(X-Y)] (h) solving the third equation for the bus CLK period; (i) determining the bus CLK frequency by taking the inverse of the bus CLK period; and (j) determining the frequency of the input oscillator by multiplying the bus CLK frequency by R.
Claim 11
Dependent Claim
15 words
The method of claim 8 wherein the communication bus is an industry standard AT bus.
Claim 12
Dependent Claim
15 words
The method of claim 8 wherein R selected is the highest ratio available for selection.
Claim 13
Dependent Claim
22 words
The method of claim 8 further comprising a step for setting timing parameters for the computer based on the input oscillator frequency.
Claim 14
Dependent Claim
119 words
A basic input output system (BIOS) for a computer system with a CPU microprocessor and a communication bus having a fixed number X of wait states per bus cycle, the BIOS comprising: a ROM device configured for connecting to the communication bus; and control routines resident in the ROM and configured for determining input oscillator frequency by selecting a microprocessor-independent reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, operating the reference device for a preprogrammed number N of operations while measuring the elapsed time, determining the bus frequency by dividing the elapsed time by N*X and taking the inverse of the result, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 15
Dependent Claim
119 words
A basic input output system (BIOS) for a computer system with a CPU microprocessor and a communication bus having a fixed number X of wait states per bus cycle, the BIOS comprising: a ROM device configured for connecting to the communication bus; and control routines resident in the ROM and configured for determining input oscillator frequency by selecting a microprocessor-independent reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, operating the reference device for a preprogrammed number N of operations while measuring the elapsed time, determining the bus frequency by dividing the elapsed time by N*X and taking the inverse of the result, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 16
Dependent Claim
14 words
A BIOS as in claim 12 wherein the bus is an industry-standard AT bus.
Claim 17
Dependent Claim
25 words
A BIOS as in claim 12 wherein the BIOS is configured for setting timing parameters for the computer based on the input oscillator frequency determined.
Claim 18
Dependent Claim
16 words
A BIOS as in claim 12 wherein the reference device is a direct memory access controller.
Claim 19
Dependent Claim
54 words
A BIOS as in claim 12 wherein the reference device is a microprocessor-dependent device, requiring interaction with the microprocessor for each operation of the reference device, and the BIOS is further configured for determining the microprocessor period and for computing and subtracting the microprocessor overhead from the elapsed time in determining the oscillator frequency.
Claim 20
Dependent Claim
191 words
A basic input output system (BIOS}for a computer system with a CPU microprocessor and a communication bus having programmable wait states, the BIOS comprising: a ROM device configured for connecting to the communication bus; and control routines resident in the ROM and configured for determining input oscillator frequency by selecting a reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, selecting a first one of the programmable wait states for which each bus cycle comprises X bus CLKs, operating the reference device for a pre-programmed number N of operations while measuring elapsed time t 1 , yielding t 1 =N*X*bus CLK period+overhead, selecting a second one of the programmable wait states for which each bus cycle comprises Y bus CLKs, operating the reference device for N operations while measuring elapsed time t 2 , yielding t 2 =N*Y*bus CLK period, subtracting equation t 2 from equation t 1 , yielding bus CLK period=(t 1 -t 2 )/[N(X-Y)], solving for bus CLK period, determining the bus frequency by taking the inverse of the bus CLK period, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 21
Dependent Claim
191 words
A basic input output system (BIOS}for a computer system with a CPU microprocessor and a communication bus having programmable wait states, the BIOS comprising: a ROM device configured for connecting to the communication bus; and control routines resident in the ROM and configured for determining input oscillator frequency by selecting a reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, selecting a first one of the programmable wait states for which each bus cycle comprises X bus CLKs, operating the reference device for a pre-programmed number N of operations while measuring elapsed time t 1 , yielding t 1 =N*X*bus CLK period+overhead, selecting a second one of the programmable wait states for which each bus cycle comprises Y bus CLKs, operating the reference device for N operations while measuring elapsed time t 2 , yielding t 2 =N*Y*bus CLK period, subtracting equation t 2 from equation t 1 , yielding bus CLK period=(t 1 -t 2 )/[N(X-Y)], solving for bus CLK period, determining the bus frequency by taking the inverse of the bus CLK period, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 22
Dependent Claim
14 words
A BIOS as in claim 17 wherein the bus is an industry-standard AT bus.
Claim 23
Dependent Claim
25 words
A BIOS as in claim 17 wherein the BIOS is configured for setting timing parameters for the computer based on the input oscillator frequency determined.
Claim 24
Dependent Claim
16 words
A BIOS as in claim 17 wherein the reference device is a direct memory access controller.
Claim 25
Dependent Claim
93 words
A general-purpose computer comprising: a CPU microprocessor; a communication bus; and a basic input output system (BIOS); wherein the BIOS comprises a ROM device configured for determining input oscillator frequency by selecting a microprocessor-independent reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, operating the reference device for a preprogrammed number N of operations while measuring the elapsed time, determining the bus frequency by dividing the elapsed time by N*X and taking the inverse of the result, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 26
Dependent Claim
93 words
A general-purpose computer comprising: a CPU microprocessor; a communication bus; and a basic input output system (BIOS); wherein the BIOS comprises a ROM device configured for determining input oscillator frequency by selecting a microprocessor-independent reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, operating the reference device for a preprogrammed number N of operations while measuring the elapsed time, determining the bus frequency by dividing the elapsed time by N*X and taking the inverse of the result, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 27
Dependent Claim
16 words
A general-purpose computer as in claim 21 wherein the ratio R is the highest selectable ratio.
Claim 28
Dependent Claim
15 words
A general-purpose computer as in claim 21 wherein the bus is an industry-standard AT bus.
Claim 29
Dependent Claim
27 words
A general-purpose computer as in claim 21 wherein the BIOS is further configured for setting timing parameters for the computer based on the input oscillator frequency determined.
Claim 30
Dependent Claim
17 words
A general-purpose computer as in claim 21 wherein the reference device is a direct memory access controller.
Claim 31
Dependent Claim
27 words
A general-purpose computer as in claim 21 wherein the BIOS is further configured for setting timing parameters for the computer based on the calculated input oscillator frequency.
Claim 32
Dependent Claim
173 words
A general-purpose computer comprising: a CPU microprocessor; a communication bus; and a basic input output system (BIOS); wherein the BIOS comprises a ROM device configured for determining input oscillator frequency by selecting a reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, selecting a first one of the programmable wait states for which each bus cycle comprises X bus CLKs, operating the reference device for a pre-programmed number of operations while measuring elapsed time t 1 , yielding t 1 =N*X*bus CLK period+overhead, selecting a second one of the programmable wait states for which each bus cycle comprises Y bus CLKs, operating the reference device for N operations while measuring elapsed time t 2 , yielding t 2 =N*Y*bus CLK period, subtracting equation t 2 from equation t 1 , yielding bus CLK period: (t 1 -t 2 )/[N(X-Y)], solving for bus CLK period, determining the bus frequency by taking the inverse of the bus CLK period, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 33
Dependent Claim
173 words
A general-purpose computer comprising: a CPU microprocessor; a communication bus; and a basic input output system (BIOS); wherein the BIOS comprises a ROM device configured for determining input oscillator frequency by selecting a reference device, selecting an oscillator-to-bus frequency ratio R for driving the bus, selecting a first one of the programmable wait states for which each bus cycle comprises X bus CLKs, operating the reference device for a pre-programmed number of operations while measuring elapsed time t 1 , yielding t 1 =N*X*bus CLK period+overhead, selecting a second one of the programmable wait states for which each bus cycle comprises Y bus CLKs, operating the reference device for N operations while measuring elapsed time t 2 , yielding t 2 =N*Y*bus CLK period, subtracting equation t 2 from equation t 1 , yielding bus CLK period: (t 1 -t 2 )/[N(X-Y)], solving for bus CLK period, determining the bus frequency by taking the inverse of the bus CLK period, and determining the input oscillator frequency by multiplying the bus frequency by R.
Claim 34
Dependent Claim
15 words
A general-purpose computer as in claim 27 wherein the bus is an industry-standard AT bus.
Claim 35
Dependent Claim
25 words
A BIOS as in claim 27 wherein the BIOS is configured for setting timing parameters for the computer based on the input oscillator frequency determined.
Claim 36
Dependent Claim
16 words
A BIOS as in claim 27 wherein the reference device is a direct memory access controller.
References Cited (Backward Citations)
US5459855A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-11-05 | 2000-05-06 | 2000-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-11-05 | 2004-05-06 | 2004-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-11-05 | 2008-05-06 | 2008-11-05 | $7700.00 | Window Closed / Lapsed |