US5572707A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Nonvolatile memory with a programmable configuration cell and a configuration logic for temporarily reconfiguring the memory without altering the programmed state of the configuration cell
Assignee: Intel Corp
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Filing: 1995-08-22
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Granted: 1996-11-05
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Expires: 2015-08-22
Abstract
Abstract A nonvolatile memory includes a memory array, control circuitry coupled to the memory array for controlling memory operations with respect to the memory array, and a configuration cell coupled to the control circuitry for generating a configuration signal to configure the nonvolatile memory with respect to the memory operations. The configuration cell can be programmed in a first state and a second state. A configuration logic is coupled to the configuration cell and the control circuitry for altering the configuration signal from the configuration cell to the control circuitry without causing the configuration cell to be reprogrammed. The configuration logic includes an exclusive or gate that temporarily alters the configuration signal without affecting a programmed state of the configuration cell. The configuration logic can also disable the configuration signal to the control circuitry and configure the nonvolatile memory with a temporary configuration information stored in a configuration register of the configuration logic.
Inventors
- 👤 Rodney R. Rozman
- 👤 Michael P. Vital
- 👤 Peter K. Hazen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 07:47
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/04; G11C29/08; G11C29/12; G11C29/18; G11C29/24; G06; G06F; G06F12/00; G06F12/02; G06F12/0223; G06F12/023; G06F12/0238; G06F12/0246
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
221 words
A nonvolatile memory, comprising: (A) a configuration cell that stores a first configuration signal; (B) a configuration register that stores a second configuration signal that can be at one of a first and a second state; (C) a logic gate coupled to the configuration cell and the configuration register; and (D) a multiplexer that selectively couples an output of one of (1) the configuration register and (2) the logic gate to a control circuit of the nonvolatile memory, wherein when the multiplexer couples the output of the configuration register to the control circuitry, the nonvolatile memory is configured by the second configuration signal, wherein when the multiplexer couples the output of the logic gate to the control circuit and the second configuration signal is at the first state, the logic gate passes the first configuration signal to the control circuit to configure the nonvolatile memory, wherein when the multiplexer couples the output of the logic gate to the control circuit and the second configuration signal is at the second state, the logic gate alters the first configuration signal without reprogramming the configuration cell and passes an altered first configuration signal to the control circuit to configure the nonvolatile memory, wherein the configuration cell, the configuration register, the logic gate, and the multiplexer all reside on the same chip as the memory.
Claim 2
Dependent Claim
221 words
A nonvolatile memory, comprising: (A) a configuration cell that stores a first configuration signal; (B) a configuration register that stores a second configuration signal that can be at one of a first and a second state; (C) a logic gate coupled to the configuration cell and the configuration register; and (D) a multiplexer that selectively couples an output of one of (1) the configuration register and (2) the logic gate to a control circuit of the nonvolatile memory, wherein when the multiplexer couples the output of the configuration register to the control circuitry, the nonvolatile memory is configured by the second configuration signal, wherein when the multiplexer couples the output of the logic gate to the control circuit and the second configuration signal is at the first state, the logic gate passes the first configuration signal to the control circuit to configure the nonvolatile memory, wherein when the multiplexer couples the output of the logic gate to the control circuit and the second configuration signal is at the second state, the logic gate alters the first configuration signal without reprogramming the configuration cell and passes an altered first configuration signal to the control circuit to configure the nonvolatile memory, wherein the configuration cell, the configuration register, the logic gate, and the multiplexer all reside on the same chip as the memory.
Claim 3
Dependent Claim
38 words
The nonvolatile memory of claim 1 further comprising a control register coupled to the multiplexer that controls the multiplexer to selectively couple the output of (1) the configuration register and (2) the logic gate to the control circuit.
Claim 4
Dependent Claim
27 words
The nonvolatile memory of claim 1, wherein configuration register is a volatile register, wherein the configuration cell is an electrically programmable and erasable read only memory cell.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-11-05 | 2000-05-06 | 2000-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-11-05 | 2004-05-06 | 2004-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-11-05 | 2008-05-06 | 2008-11-05 | $7700.00 | Window Closed / Lapsed |