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US5568470A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for controlled-latency transfer of transmitt ATM traffic and synchronous feedback over a physical interface

Assignee: Enterasys Networks Inc
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Filing: 1995-04-28
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Granted: 1996-10-22
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Expires: 2015-04-28
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Abstract

Abstract In an asynchronous transfer mode (ATM) endnode a method is provided by which ATM cells can experience a small delay from the ATM layer to the PHY layer to transmission on the ATM network. Such an arrangement includes providing the endnode with an ATM layer, the ATM layer having a first-in-first-out (FIFO) queue for transmitting transmit ATM traffic, providing the endnode with a PHY layer, the PHY layer having a FIFO queue for receiving the transmit ATM traffic, providing an interface between the FIFO queue of the ATM layer and the FIFO queue of the PHY layer for the flow of the transmit ATM traffic, providing a signal in the ATM endnode, providing a state machine in the ATM endnode, the state machine monitoring the signal in the ATM endnode, stalling the transfer of the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY layer over the interface when the signal and the state machine indicate that the FIFO of the PHY layer is full, and transmitting the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY over the interface. By causing the ATM layer to generate/transfer a continuous stream of cells to the PHY layer, the method can provide cell time indications to allow the ATM layer to synchronize itself to the network.

Inventors

  • 👤 Michael Ben-Nun
  • 👤 Winthrop J. Wu
  • 👤 Niamh Darcy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 19:25
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04Q11/0428; H04Q11/0478; H04L; H04L12/00; H04L12/54; H04L12/56; H04L12/5601; H04L2012/5614; H04L2012/5615; H04L2012/5629; H04L2012/563; H04L2012/5638; H04L2012/5646; H04L2012/5647; H04L2012/5672; H04L2012/5674; H04L2012/5678; H04L2012/5681

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 185 words
A method for a controlled-latency transfer of transmit asynchronous transfer mode (ATM) traffic in an ATM endnode comprising the steps of: providing the endnode with an ATM layer, the ATM layer having a first-in-first-out (FIFO) queue for transmitting transmit ATM traffic; providing the endnode with a PHY layer, the PHY layer having a FIFO queue for receiving the transmit ATM traffic from the ATM layer; providing an interface between the FIFO queue of the ATM layer and the FIFO queue of the PHY layer for the flow of the transmit ATM traffic; providing a signal in the ATM endnode; providing a state machine in the ATM endnode, the state machine monitoring the signal in the ATM endnode; stalling the transfer of the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY layer over the interface when the signal and the state machine indicate that the FIFO of the PHY layer is full or nearly full; and transmitting the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY layer over the interface.
Claim 2
Independent Claim 185 words
A method for a controlled-latency transfer of transmit asynchronous transfer mode (ATM) traffic in an ATM endnode comprising the steps of: providing the endnode with an ATM layer, the ATM layer having a first-in-first-out (FIFO) queue for transmitting transmit ATM traffic; providing the endnode with a PHY layer, the PHY layer having a FIFO queue for receiving the transmit ATM traffic from the ATM layer; providing an interface between the FIFO queue of the ATM layer and the FIFO queue of the PHY layer for the flow of the transmit ATM traffic; providing a signal in the ATM endnode; providing a state machine in the ATM endnode, the state machine monitoring the signal in the ATM endnode; stalling the transfer of the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY layer over the interface when the signal and the state machine indicate that the FIFO of the PHY layer is full or nearly full; and transmitting the transmit ATM traffic from the FIFO of the ATM layer to the FIFO of the PHY layer over the interface.
Claim 3
Dependent Claim 21 words
The method for a controlled-latency transfer according to claim 1 wherein the transmit ATM traffic is a plurality of ATM cells.
Claim 4
Dependent Claim 35 words
The method for a controlled-latency transfer according to claim 2 wherein the ATM layer further includes: means for generating idle/unassigned ATM cells; and a timer capable of timing several ATM cell-times with byte transfer-time resolution.
Claim 5
Dependent Claim 24 words
The method for a controlled-latency transfer according to claim 3 wherein the signal represents the space available in the FIFO of the PHY layer.
Claim 6
Dependent Claim 46 words
The method for a controlled-latency transfer according to claim 4 wherein the step of providing the state machine further includes the step of: if the state machine is in an idle state and the signal is deasserted, the state machine placing itself in a drain state.
Claim 7
Dependent Claim 50 words
The method for a controlled-latency transfer according to claim 4 wherein the step of providing the state machine further includes the step of: if the state machine is in an idle state and the signal is asserted, the state machine placing itself in the watt state and monitors the signal.
Claim 8
Dependent Claim 87 words
The method for a controlled-latency transfer according to claim 4 wherein the step of providing the state machine further includes the step of: if a signal is still asserted at the end of a predetermined period of time, the state machine advances to a transfer state and notifies the ATM layer to begin the transmitting step; and if the signal is deasserted before the end of the predetermined period of time, then the state machine advances to an idle state to wait for the signal to reassert.
Claim 9
Dependent Claim 54 words
The method for a controlled-latency transfer according to claim 4 wherein the step of providing the state machine further includes the step of: if the state machine notifies the ATM layer to begin the transmitting step and the ATM layer does not have ATM cells to transmit, the ATM layer transmitting idle/unassigned ATM cells.
Claim 10
Dependent Claim 69 words
The method for a controlled-latency transfer according to claim 4 wherein the step of providing the state machine further includes the steps of: while the state machine is in a transfer state, the state machine monitoring the signal and waiting for an indication from the ATM layer that the step of transmitting is complete; and upon completion of the transmitting step the state machine returning to an idle state.
Claim 11
Dependent Claim 58 words
The method for a controlled-latency transfer according to claim 4 wherein the step of transmitting further includes the step of: if the signal deasserts while the transfer is still in progress, the state machine going into an int -- transfer state to indicate that the FIFO of the PHY layer is nearly full or full with ATM cells.
Claim 12
Dependent Claim 67 words
The method for a controlled-latency transfer according to claim 10 wherein the step of transmitting further includes the steps of: after the ATM cell transfer is complete, the state machine placing itself in a drain state and remaining there for a predetermined amount of time to allow the PHY layer to drain out ATM cells from its FIFO before the ATM layer can send more ATM cells.
Claim 13
Dependent Claim 27 words
The method for a controlled-latency transfer according to claim 11 wherein the state machine returns to the idle state after the predetermined amount of time has lapsed.
Claim 14
Dependent Claim 28 words
The method for a controlled-latency transfer according to claim 11 wherein the predetermined amount of time is (size of the Phy layer FIFO minus one) times 53 byte-times.
Claim 15
Dependent Claim 19 words
The method for a controlled-latency transfer according to claim 11 wherein the predetermined amount of time is zero byte-times.

References Cited (Backward Citations)

US5179549A Cited
US5400329A Cited
US5493566A Cited
US5483526A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-22 2000-04-22 2000-10-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-22 2004-04-22 2004-10-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-22 2008-04-22 2008-10-22 $7700.00 Window Closed / Lapsed

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