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US5568345A Expired / Lapsed US ⏱️ 0.0 years remaining

Overvoltage protection circuit

Assignee: Microchip Technology Caldicot Ltd
•
Filing: 1994-10-18
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Granted: 1996-10-22
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Expires: 2014-10-18
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Abstract

Abstract An overvoltage protection circuit employs a series of semiconductor switching elements, each element having a control terminal and two main conduction terminals, in a totem pole configuration and two potential dividers whose tapping points feed, respectively, the control terminals and the main terminal junctions of the switching elements. Both the series of switching elements and the two potential dividers are connected between a reference node (zero volts) and a node to be protected from an electrostatic discharge. The resistive elements of the potential dividers are so arranged that, in the absence of a static discharge, all switching elements are cut off and experience a substantially equal voltage across the respective main terminals. In this way, the circuit may be usefully employed in integrated circuits which are based on a low-voltage integration process but which have also a high-voltage-supply rail (e.g. 30 V). The switching elements may be bipolar transistors, and preferably Darlington pairs.

Inventors

  • 👤 Mark S. J. Mudd
  • 👤 Ross Addinall

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 01:41
CPC Classifications
H; H02; H02H; H02H9/00; H02H9/04; H02H9/045; H02H9/046; H02H9/041

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 262 words
An overvoltage protection circuit for connection between a first, reference node and a second node which is to be protected against overvoltage with respect to the first node, the protection circuit comprising: a first plurality of controllable switching elements each having a control terminal and first and second main terminals, said first plurality of switching elements being connected in series between said first and second nodes by way of a second plurality of junctions between respective first and second main terminals of adjacent ones of said first plurality of switching elements, the second plurality being equal to the first plurality minus one; biasing means connected to said first plurality of switching elements and including first and second potential divider chains each connected between said first and second nodes, the first potential divider chain having a third plurality of tapping points, the second potential divider chain having a fourth plurality of tapping points, the fourth plurality being equal to the third plurality minus one, the tapping points of the first potential divider chain being connected to corresponding control terminals of the first plurality of switching elements, the tapping points of the second potential divider chain being connected to corresponding ones of said junctions between said respective main terminals of said switching elements; and said biasing means being arranged, in the absence of an overvoltage, for biasing the first plurality of switching elements into a substantially non-conducting state, and for establishing voltages between the first and second main terminals of the respective switching elements which are within a rated value for said switching elements.
Claim 2
Dependent Claim 262 words
An overvoltage protection circuit for connection between a first, reference node and a second node which is to be protected against overvoltage with respect to the first node, the protection circuit comprising: a first plurality of controllable switching elements each having a control terminal and first and second main terminals, said first plurality of switching elements being connected in series between said first and second nodes by way of a second plurality of junctions between respective first and second main terminals of adjacent ones of said first plurality of switching elements, the second plurality being equal to the first plurality minus one; biasing means connected to said first plurality of switching elements and including first and second potential divider chains each connected between said first and second nodes, the first potential divider chain having a third plurality of tapping points, the second potential divider chain having a fourth plurality of tapping points, the fourth plurality being equal to the third plurality minus one, the tapping points of the first potential divider chain being connected to corresponding control terminals of the first plurality of switching elements, the tapping points of the second potential divider chain being connected to corresponding ones of said junctions between said respective main terminals of said switching elements; and said biasing means being arranged, in the absence of an overvoltage, for biasing the first plurality of switching elements into a substantially non-conducting state, and for establishing voltages between the first and second main terminals of the respective switching elements which are within a rated value for said switching elements.
Claim 3
Dependent Claim 59 words
The overvoltage protection circuit according to claim 1, wherein the second potential divider chain has dividing elements all of substantially the same impedance value, and wherein the first potential divider chain has dividing elements all of substantially the same impedance value, except for the dividing element of the first potential divider chain that is connected to the first node.
Claim 4
Dependent Claim 15 words
The overvoltage protection circuit according to claim 1, wherein the switching elements are bipolar transistors.
Claim 5
Dependent Claim 14 words
The overvoltage protection circuit according to claim 3, wherein the transistors are Darlington pairs.
Claim 6
Dependent Claim 17 words
The overvoltage protection circuit according to claim 4, wherein the Darlington pairs are pairs of NPN transistors.
Claim 7
Dependent Claim 17 words
The overvoltage protection circuit according to claim 4, wherein the Darlington pairs are pairs of PNP transistors.

References Cited (Backward Citations)

GB1004514A Cited
GB1393748A Cited
US4282556A Cited
US4704654A Cited
EP0166581A2 Cited
US4821136A Cited
WO1988003608A1 Cited
US5050060A Cited
EP0435047A2 Cited
WO1992022950A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-22 2000-04-22 2000-10-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-22 2004-04-22 2004-10-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-22 2008-04-22 2008-10-22 $7700.00 Window Closed / Lapsed

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