US5567962A
Expired / Lapsed
US
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Semiconductor memory device
Assignee: Canon Inc
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Filing: 1994-06-21
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Granted: 1996-10-22
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Expires: 2014-06-21
Abstract
Abstract A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.
Inventors
- 👤 Mamoru Miyawaki
- 👤 Akira Ishizaki
- 👤 Genzo Momma
- 👤 Hiroshi Yuzurihara
- 👤 Tetsunobu Kohchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 04:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/62; H10D30/6211; H10B; H10B12/00; H10B12/30; H10B69/00; H10D30/01; H10D30/021; H10D30/024; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0149; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
123 words
A semiconductor device comprising: a convex section provided on a surface of a semiconductor body, and having source, drain, and channel regions; a gate electrode having opposing sections sandwiching said channel region; a gate insulation film provided between said channel region and said gate electrode; a film capable of performing a memory function provided at one of said source and drain regions, and having a top section and opposing sections sandwiching said convex section; an electrode having a top section and an opposing section provided on said film and capable of performing a memory function; and a region doped with an impurity of high concentration disposed adjacent to said channel region, and having the same conductivity type as that of said channel region.
Claim 2
Dependent Claim
123 words
A semiconductor device comprising: a convex section provided on a surface of a semiconductor body, and having source, drain, and channel regions; a gate electrode having opposing sections sandwiching said channel region; a gate insulation film provided between said channel region and said gate electrode; a film capable of performing a memory function provided at one of said source and drain regions, and having a top section and opposing sections sandwiching said convex section; an electrode having a top section and an opposing section provided on said film and capable of performing a memory function; and a region doped with an impurity of high concentration disposed adjacent to said channel region, and having the same conductivity type as that of said channel region.
Claim 3
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein at the other of said source and drain regions, an electrode having opposing sections sandwiching said convex section is provided.
Claim 4
Dependent Claim
47 words
A semiconductor device according to claim 1, wherein said doped region is provided on a substrate having a semiconductor layer of the same conductivity type as that of said doped region and being doped with the impurity at a concentration higher than that of said doped region.
Claim 5
Dependent Claim
28 words
A semiconductor device according to claim 1, wherein at both sides of said convex section, an insulating film is formed, and, further thereon, a flattened film is provided.
Claim 6
Dependent Claim
124 words
A semiconductor device comprising: a convex section provided on a surface of a semiconductor body, and having two main electrode regions and a channel region; a gate electrode having opposing sections sandwiching said channel region; a gate insulation film provided between said channel region and said gate electrode; a film capable of performing a memory function provided at one of said main electrode regions, and having a top section and opposing sections sandwiching said convex section; an electrode having a top section and opposing section provided on said film and capable of performing a memory function; and a region doped with an impurity of high concentration disposed adjacent to said channel region, and having the same conductivity type as that of said channel region.
Claim 7
Dependent Claim
124 words
A semiconductor device comprising: a convex section provided on a surface of a semiconductor body, and having two main electrode regions and a channel region; a gate electrode having opposing sections sandwiching said channel region; a gate insulation film provided between said channel region and said gate electrode; a film capable of performing a memory function provided at one of said main electrode regions, and having a top section and opposing sections sandwiching said convex section; an electrode having a top section and opposing section provided on said film and capable of performing a memory function; and a region doped with an impurity of high concentration disposed adjacent to said channel region, and having the same conductivity type as that of said channel region.
Claim 8
Dependent Claim
27 words
A semiconductor device according to claim 5, wherein at the other of said main electrode regions, an electrode having opposing sections sandwiching said convex section is provided.
Claim 9
Dependent Claim
47 words
A semiconductor device according to claim 5, wherein said doped region is provided on a substrate having a semiconductor layer of the same conductivity type as that of said doped region and being doped with the impurity at a concentration higher than that of said doped region.
Claim 10
Dependent Claim
28 words
A semiconductor device according to claim 5, wherein at both sides of said convex section, an insulating film is formed, and, further thereon, a flattened film is provided.
Claim 11
Dependent Claim
18 words
A semiconductor device according to claim 5, wherein said film having a memory function comprises an insulating film.
Claim 12
Dependent Claim
18 words
A semiconductor device according to claim 1, wherein said film having a memory function comprises an insulating film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-10-22 | 2000-04-22 | 2000-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-10-22 | 2004-04-22 | 2004-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-10-22 | 2008-04-22 | 2008-10-22 | $7700.00 | Window Closed / Lapsed |