← Back to Patent Explorer
US5567637A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating a micro-trench floating gate electrode for flash memory cell

Assignee: PS4 Luxco SARL
•
Filing: 1995-07-05
•
Granted: 1996-10-22
•
Expires: 2015-07-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract There is provided a method of fabrication a storage capacitor. A bottom semiconductor film having an electrical conductivity if formed for subsequent formation of a phase splitting glass film on the bottom semiconductor film. The phase splitting glass film is subjected to a heat treatment to allow the phase splitting glass film to be split into at least two different glass films which have different components. The phase splitting glass film is subjected to an etching in which one of the glass films has a higher etching rate than an etching rate of another of the glass films so that the one glass film having the higher etching rate only is removed, while the another glass film remains thereby a mask pattern comprising the remaining another glass film is formed. The bottom semiconductor film is subjected to a dry etching using the mask to form trench grooves defined by trench pillars in the bottom semiconductor film. A dielectric film is formed on surfaces of the trench grooves and trench pillars. A top semiconductor film having an electrical conductivity is formed on the dielectric film.

Inventors

  • 👤 Toshiyuki Hirota

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 18:37
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/6891

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 189 words
A method of fabricating control and floating gate electrodes involved in a flash memory cell comprising the steps of: forming a bottom semiconductor film serving as a floating gate electrode; forming a phase splitting glass film on said bottom semiconductor film; subjecting said phase splitting glass film to a heat treatment to allow said phase splitting glass film to be split into at least two different glass films which have different components; subjecting said phase splitting glass film to an etching in which one of said glass films has a higher etching rate than an etching rate of another of said glass films so that said one glass film having the higher etching rate only is removed, while said another glass film remains thereby a mask pattern comprising the remaining glass film is formed; subjecting said bottom semiconductor film to a dry etching using said mask pattern to form trench grooves defined by trench pillars in said bottom semiconductor film; forming a dielectric film on surfaces of said trench grooves and trench pillars; and forming a top semiconductor film serving as a control gate electrode on said dielectric film.
Claim 2
Independent Claim 189 words
A method of fabricating control and floating gate electrodes involved in a flash memory cell comprising the steps of: forming a bottom semiconductor film serving as a floating gate electrode; forming a phase splitting glass film on said bottom semiconductor film; subjecting said phase splitting glass film to a heat treatment to allow said phase splitting glass film to be split into at least two different glass films which have different components; subjecting said phase splitting glass film to an etching in which one of said glass films has a higher etching rate than an etching rate of another of said glass films so that said one glass film having the higher etching rate only is removed, while said another glass film remains thereby a mask pattern comprising the remaining glass film is formed; subjecting said bottom semiconductor film to a dry etching using said mask pattern to form trench grooves defined by trench pillars in said bottom semiconductor film; forming a dielectric film on surfaces of said trench grooves and trench pillars; and forming a top semiconductor film serving as a control gate electrode on said dielectric film.
Claim 3
Dependent Claim 24 words
The method as claimed in claim 1, wherein said phase splitting glass film comprise B 2 O 3 and SiO 2 as base components.
Claim 4
Dependent Claim 29 words
The method as claimed in claim 1, wherein said phase splitting glass film comprises P 2 O 5 , B 2 O 3 and SiO 2 as base components.
Claim 5
Dependent Claim 23 words
The method as claimed in claim 1, wherein said base component SiO 2 is in the range from 60 to 80 mol %.
Claim 6
Dependent Claim 20 words
The method as claimed in claim 1, wherein said phase splitting glass film is deposited by a chemical vapor deposition.
Claim 7
Dependent Claim 21 words
The method as claimed in claim 5, wherein said chemical vapor deposition is carried out at a temperature of 400° C.
Claim 8
Dependent Claim 17 words
The method as claimed in claim 1, wherein said phase splitting glass film is deposited by sputtering.
Claim 9
Dependent Claim 20 words
The method as claimed in claim 1, wherein said heat treatment is carried out a temperature below a liquidus line.
Claim 10
Dependent Claim 25 words
The method as claimed in claim 2, wherein said heat treatment is carried out at a temperature of 7000° C. for 30 to 60 minutes.
Claim 11
Dependent Claim 25 words
The method as claimed in claim 3, wherein said heat treatment is carried out at a temperature of 680° C. for 30 to 60 minutes.
Claim 12
Dependent Claim 16 words
The method as claimed in claim 1, wherein said top and bottom semiconductor films comprise polysilicon.
Claim 13
Dependent Claim 18 words
The method as claimed in claim 1, wherein said one glass film is removed by a wet etching.
Claim 14
Dependent Claim 26 words
The method as claimed in claim 1, wherein said one glass film is removed by an anisotropic dry etching carried out to form said trench grooves.
Claim 15
Dependent Claim 22 words
The method as claimed in claim 1, wherein said trench grooves have a width in the range from 10 to 100 nanometers.

References Cited (Backward Citations)

JPH01119049A Cited
US4988635A Cited
US5215933A Cited
JPH04196435A Cited
US5225362A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-22 2000-04-22 2000-10-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-22 2004-04-22 2004-10-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-22 2008-04-22 2008-10-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag