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Patent US5563822A successfully refreshed from Google Patents.
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US5563822A Expired / Lapsed US ⏱️ 0.0 years remaining

Fast flash EPROM programming and pre-programming circuit design

Assignee: Macronix International Co Ltd
•
Filing: 1995-05-18
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Granted: 1996-10-08
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Expires: 2015-05-18
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Abstract

Abstract A circuit for speeding up the pre-programming of floating gate storage transistors such as FLASH EPROMS, and particularly speeding up the pre-programming of a block or array of floating gate storage transistors includes a controllable voltage source that supplies gate programming potential across the control gate and source of the FLASH EPROM transistor cells to be programmed. A control circuit is provided that controls the voltage source to vary the gate programming potential during a programming interval as a function of time in order to decrease the time required for a given amount of charge movement to program the selected floating gate transistors. The wordline voltages are varied, while the source voltage is held constant. By starting at a lower wordline voltage, and increasing during the programming interval to a high wordline voltage, the programming speed is increased, and the high final turn-on threshold voltage for the programmed floating gate storage transistors is achieved. In addition, in order to speed up pre-programming, a programming potential is applied to four wordlines in parallel during a single programming interval. Further, the load on cells being programmed is adjusted to improve programming speed.

Inventors

  • 👤 Tom D. Yiu
  • 👤 Ray L. Wan
  • 👤 Ling-Wen Hsiao
  • 👤 Tien-Ler Lin
  • 👤 Fuchia Shone

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 20:20
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/12; G11C16/14; G11C16/16; G11C16/24

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 166 words
In a data storage device including a plurality of floating gate storage transistors having respective control gates, sources and drains, an apparatus for hot electron injecting a charge into a floating gate comprising: a voltage source, coupled to the control gate, the source, and the drain of a selected floating gate storage transistor, to supply a gate programming potential to the control gate, a voltage to the source, and a voltage to the drain of the selected floating gate storage transistor to hot electron inject a charge into the floating gate; and a control circuit coupled to the voltage source for varying the gate programming potential during hot electron injection within a single pulse having a first interval and a second interval after the first interval, so that a first potential sufficient to induce hot electron injection is applied during the first interval of the single pulse and a second potential higher than the first potential is applied during the second interval of the single pulse.
Claim 2
Dependent Claim 166 words
In a data storage device including a plurality of floating gate storage transistors having respective control gates, sources and drains, an apparatus for hot electron injecting a charge into a floating gate comprising: a voltage source, coupled to the control gate, the source, and the drain of a selected floating gate storage transistor, to supply a gate programming potential to the control gate, a voltage to the source, and a voltage to the drain of the selected floating gate storage transistor to hot electron inject a charge into the floating gate; and a control circuit coupled to the voltage source for varying the gate programming potential during hot electron injection within a single pulse having a first interval and a second interval after the first interval, so that a first potential sufficient to induce hot electron injection is applied during the first interval of the single pulse and a second potential higher than the first potential is applied during the second interval of the single pulse.
Claim 3
Dependent Claim 28 words
The apparatus of claim 1, wherein the control circuit changes the gate programming potential from the first potential to the second potential relatively abruptly after the first interval.
Claim 4
Dependent Claim 28 words
The apparatus of claim 1, wherein the control circuit changes the gate programming potential from the first potential to the second potential relatively gradually after the first interval.
Claim 5
Dependent Claim 79 words
The apparatus of claim 1, wherein the voltage source includes a controllable voltage source applying a voltage to the control gate of the selected floating gate storage transistor, and the control circuit controls the gate programming potential by maintaining the voltage on the source of the selected floating gate storage transistor at a substantially constant programming voltage and controlling the controllable voltage source to vary the voltage applied to the control gate of the selected floating gate storage transistor.
Claim 6
Dependent Claim 25 words
The apparatus of claim 4, wherein the voltage source applies substantially a ground potential to the sources of the floating gate storage transistors during programming.
Claim 7
Dependent Claim 49 words
The apparatus of claim 1, wherein the data storage device includes a data line coupled to the drains of a subset of the plurality of floating gate storage transistors, and further includes a circuit coupled with the data line to reduce load resistance of the data line during programming.

References Cited (Backward Citations)

US5050125A Cited
US5043940A Cited
US5163021A Cited
US5399891A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-08 2000-04-08 2000-10-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-08 2004-04-08 2004-10-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-08 2008-04-08 2008-10-08 $7700.00 Window Closed / Lapsed

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