Method and apparatus for a regulated supply on an integrated circuit

Claim 2

A regulated integrated circuit power supply comprising: (a) a charge pump that receives a triggering source and is operably coupled to a first potential and a second potential, wherein the charge pump includes: (i) variable capacitor having a first node and a second node, wherein a capacitance value of the variable capacitor is controlled by a capacitance control signal; (ii) switching elements that couple the first node to the first potential and the second node to the second potential during a first phase of the triggering source, and couples the second node to the first potential during a second phase of the triggering source; (b) output capacitor that is operably coupled to the first node during the second phase; (c) sensing circuit operably coupled to the output capacitor, wherein the sensing circuit provides a control signal based on a comparison between an output voltage across the output capacitor and a voltage threshold; and (d) control circuit operably coupled to the sensing circuit and the charge pump, wherein the control circuit generates the capacitance control signal based on the control signal such that the voltage across the output capacitor is based on a relationship between the variable capacitor and the output capacitor.

Claim 3

The regulated integrated circuit power supply of claim 1 wherein the variable capacitor comprises a capacitor array to produce a desired capacitance between the first node and the second node.

Claim 4

The regulated integrated circuit power supply of claim 2 wherein the variable capacitor may be set by the capacitance control signal to any of a plurality of predetermined capacitance levels, the predetermined capacitance levels successively arranged from a first capacitance level wherein the variable capacitor is of a minimum capacitance to a last capacitance level wherein the variable capacitor is of a maximum capacitance.

Claim 5

The regulated integrated circuit power supply of claim 3 wherein, when the capacitance control signal changes, the capacitance value of the variable capacitor is adjusted by a single capacitance level.

Claim 6

A regulated integrated circuit power supply comprising: (a) a charge pump that receives a triggering source and is operably coupled to a first potential and a second potential, wherein the charge pump includes: (i) variable capacitor having a first node and a second node, wherein capacitance value of the variable capacitor is controlled by a capacitance control signal; (ii) switching elements that couple the first node to the first potential and the second node to the second potential during a first phase of the triggering source, and couples the second node to the first potential during a second phase of the triggering source; (b) output capacitor that is operably coupled to the first node during the second phase; (c) sensing circuit operably coupled to the charge pump, wherein the sensing circuit provides a first signal when output voltage across the output capacitor is less than a first threshold and provides a second signal when the output voltage is greater than a second threshold, wherein the second threshold is greater than the first threshold; and (d) control circuit operably coupled to the sensing circuit and the charge pump, wherein the control circuit generates the capacitance control signal based on the first signal or the second signal.

Claim 7

A regulated integrated circuit power supply comprising: (a) a charge pump that receives a triggering source and is operably coupled to a first potential and a second potential, wherein the charge pump includes: (i) variable capacitor having a first node and a second node, wherein capacitance value of the variable capacitor is controlled by a capacitance control signal; (ii) switching elements that couple the first node to the first potential and the second node to the second potential during a first phase of the triggering source, and couples the second node to the first potential during a second phase of the triggering source; (b) output capacitor that is operably coupled to the first node during the second phase; (c) sensing circuit operably coupled to the charge pump, wherein the sensing circuit provides a first signal when output voltage across the output capacitor is less than a first threshold and provides a second signal when the output voltage is greater than a second threshold, wherein the second threshold is greater than the first threshold; and (d) control circuit operably coupled to the sensing circuit and the charge pump, wherein the control circuit generates the capacitance control signal based on the first signal or the second signal.

Claim 8

The regulated integrated circuit power supply of claim 5 wherein the variable capacitor comprises a capacitor array to produce a desired capacitance between the first node and the second node.

Claim 9

The regulated integrated circuit power supply of claim 6 wherein the variable capacitor may be set by the capacitance control signal to any of a plurality of predetermined capacitance levels, the predetermined capacitance levels successively arranged from a first capacitance level wherein the variable capacitor is of a minimum capacitance to a last capacitance level wherein the variable capacitor is of a maximum capacitance.

Claim 10

The regulated integrated circuit power supply of claim 7 wherein, when the capacitance control signal changes, the capacitance value of the variable capacitor is adjusted by a single capacitance level.

Claim 11

A clock driver circuit comprising: (a) a charge pump that receives a clock signal, is operably coupled to a first potential and a second potential, and produces a clock output, wherein the charge pump includes: (i) variable capacitor having a first node and a second node, wherein a capacitance value of the variable capacitor is controlled by a capacitance control signal; (ii) switching elements that couple, during a first phase of the clock signal, the first node to the first potential, the second node to the second potential, the clock output to the second potential, and couple, during a second phase of the clock signal, the second node to the first potential and the first node to the clock output; (b) sensing circuit operably coupled to the clock output, wherein the sensing circuit provides a control signal based on a comparison between the clock output and a voltage threshold; and (c) control circuit operably coupled to the sensing circuit and the charge pump, wherein the control circuit generates the capacitance control signal based on the control signal such that magnitude of the clock output is based on a relationship between the variable capacitor and an output capacitance connected to the clock output.

Claim 12

A clock driver circuit comprising: (a) a charge pump that receives a clock signal, is operably coupled to a first potential and a second potential, and produces a clock output, wherein the charge pump includes: (i) variable capacitor having a first node and a second node, wherein a capacitance value of the variable capacitor is controlled by a capacitance control signal; (ii) switching elements that couple, during a first phase of the clock signal, the first node to the first potential, the second node to the second potential, the clock output to the second potential, and couple, during a second phase of the clock signal, the second node to the first potential and the first node to the clock output; (b) sensing circuit operably coupled to the clock output, wherein the sensing circuit provides a control signal based on a comparison between the clock output and a voltage threshold; and (c) control circuit operably coupled to the sensing circuit and the charge pump, wherein the control circuit generates the capacitance control signal based on the control signal such that magnitude of the clock output is based on a relationship between the variable capacitor and an output capacitance connected to the clock output.

Claim 13

The clock driver circuit of claim 9 wherein the variable capacitor comprises a capacitor array to produce a desired capacitance between the first node and the second node.

Claim 14

The clock driver circuit of claim 10 wherein the variable capacitor may be set by the capacitance control signal to any of a plurality of predetermined capacitance levels, the predetermined capacitance levels successively arranged from a first capacitance level wherein the variable capacitor is of a minimum capacitance to a last capacitance level wherein the variable capacitor is of a maximum capacitance.

Claim 15

The clock driver circuit of claim 11 wherein, when the capacitance control signal changes, the capacitance value of the variable capacitor is adjusted by a single capacitance level.