Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
62 words
A programmable logic device comprising: a memory cell capable of storing either an programmed state or an erased state; and a sense amplifier adapted to identify said stored state, such that said sense amplifier is enabled if said stored state corresponds to an erased state, and such that said sense amplifier is disabled if said stored state corresponds to a programmed state.
Claim 2
Dependent Claim
62 words
A programmable logic device comprising: a memory cell capable of storing either an programmed state or an erased state; and a sense amplifier adapted to identify said stored state, such that said sense amplifier is enabled if said stored state corresponds to an erased state, and such that said sense amplifier is disabled if said stored state corresponds to a programmed state.
Claim 3
Dependent Claim
26 words
The programmable logic device of claim 1 wherein said memory cell includes a PROM, an EPROM, an EEPROM, a flash EPROM, or a flash EEPROM cell.
Claim 4
Dependent Claim
26 words
The programmable logic device of claim 1 wherein said sense amplifier includes a trigger circuit responsive to a power-on-reset (POR) signal which initializes said sense amplifier.
Claim 5
Dependent Claim
21 words
The programmable logic device of claim 3 wherein said trigger circuit includes a latch that is reset by said POR signal.
Claim 6
Dependent Claim
27 words
The programmable logic device of claim 4 wherein said trigger circuit creates an enable ready state in said sense amplifier in response to a latch enable signal.
Claim 7
Dependent Claim
75 words
A sense amplifier comprising: a bitline; a memory cell connected to said bitline; means for detecting a voltage change on said bitline in said sense amplifier; means for propagating and amplifying said voltage change; and a trigger circuit including a latch for automatically enabling said sense amplifier in response to selecting said memory cell, wherein said latch receives a power-on-reset (POR) signal, thereby setting said latch in a default configuration that disables said sense amplifier.
Claim 8
Dependent Claim
75 words
A sense amplifier comprising: a bitline; a memory cell connected to said bitline; means for detecting a voltage change on said bitline in said sense amplifier; means for propagating and amplifying said voltage change; and a trigger circuit including a latch for automatically enabling said sense amplifier in response to selecting said memory cell, wherein said latch receives a power-on-reset (POR) signal, thereby setting said latch in a default configuration that disables said sense amplifier.
Claim 9
Dependent Claim
51 words
The sense amplifier of claim 6 wherein said trigger circuit includes a first transistor having a gate, a source, and a drain, wherein said gate receives said POR signal, wherein said drain is coupled to a first voltage source, and wherein said source is coupled to one terminal of said latch.
Claim 10
Dependent Claim
31 words
The sense amplifier of claim 7 wherein said trigger circuit further includes a reset circuit coupled to the output line of said sense amplifier and said one terminal of said latch.
Claim 11
Dependent Claim
77 words
The sense amplifier of claim 8 wherein said reset circuit includes a feedback line and a second transistor having a gate, a source, and a drain, wherein said feedback line is coupled to said output line of said sense amplifier and to said gate of said second transistor, said source of said second transistor is coupled to a second voltage source, and said drain of said second transistor is coupled to said one terminal of said latch.
Claim 12
Dependent Claim
26 words
The sense amplifier of claim 9 wherein said trigger circuit further includes a latch enable circuit for providing an enable ready state in said sense amplifier.
Claim 13
Independent Claim
67 words
A method for automatically enabling a sense amplifier comprising the steps of: storing either a programmed state or an erased state in a memory cell; and identifying the stored state with a sense amplifier such that said sense amplifier is enabled if said stored state corresponds to said erased state, and such that said sense amplifier is disabled if said stored state corresponds to said programmed state.
Claim 14
Independent Claim
67 words
A method for automatically enabling a sense amplifier comprising the steps of: storing either a programmed state or an erased state in a memory cell; and identifying the stored state with a sense amplifier such that said sense amplifier is enabled if said stored state corresponds to said erased state, and such that said sense amplifier is disabled if said stored state corresponds to said programmed state.
Claim 15
Dependent Claim
25 words
The method of claim 11 wherein said memory cell is either a PROM, an EPROM, an EEPROM, a flash EPROM, or a flash EEPROM cell.
Claim 16
Dependent Claim
25 words
The method of claim 11, further comprising the step of: initializing said sense amplifier with an enable circuit in response to a power-on-reset (POR) signal.
Claim 17
Dependent Claim
17 words
The method of claim 13, further comprising the step of: resetting a latch with said POR signal.