Patent US5559368A successfully refreshed from Google Patents.
US5559368A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation
Assignee: University of California
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Filing: 1994-08-30
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Granted: 1996-09-24
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Expires: 2014-08-30
Abstract
Abstract A dynamic threshold voltage IGFET such as a MOSFET is operable at voltages of 0.6 volt or less. The threshold voltage of the transistor is reduced to zero volt or less by interconnecting the gate contact and the device body in which the voltage controlled channel is located. Several efficient connections using through hole plating or polycrystalline silicon gate extension are disclosed. A higher power supply voltage can be used by interconnecting the gate and device body through a smaller MOSFET.
Inventors
- 👤 Chenming Hu
- 👤 Ping K. Ko
- 👤 Fariborz Assaderaghi
- 👤 Stephen Parke
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:20
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D30/00; H10D30/60; H10D30/637; H10D30/67; H10D30/6704; H10D30/6757; H10D30/721
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
157 words
A dynamic threshold insulated gate field effect device comprising a first transistor formed in a first semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region, a second transistor formed in a second semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region, means for interconnecting said drain of said second transistor to said gate of said first transistor, means for interconnecting said source of said second transistor to said first semiconductor body region, means for interconnecting said source of said first transistor to a reference potential, and means for biasing said gate contact of said second transistor with an appropriate gate voltage whereby said second transistor applies a forward bias to said first semiconductor body region relative to said source of said first transistor.
Claim 2
Dependent Claim
157 words
A dynamic threshold insulated gate field effect device comprising a first transistor formed in a first semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region, a second transistor formed in a second semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region, means for interconnecting said drain of said second transistor to said gate of said first transistor, means for interconnecting said source of said second transistor to said first semiconductor body region, means for interconnecting said source of said first transistor to a reference potential, and means for biasing said gate contact of said second transistor with an appropriate gate voltage whereby said second transistor applies a forward bias to said first semiconductor body region relative to said source of said first transistor.
Claim 3
Dependent Claim
17 words
The device as defined by claim 1 wherein said first transistor is larger than said second transistor.
References Cited (Backward Citations)
US5272432A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-24 | 2000-03-25 | 2000-09-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-24 | 2004-03-25 | 2004-09-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-24 | 2008-03-25 | 2008-09-24 | $7700.00 | Window Closed / Lapsed |