System for bi-level symbol coding/decoding with saved storage and method for same

Claim 1

An arithmetic coding-decoding system comprising: a coding subsystem for coding a set of bi-level symbols inputted to the system, in an original sequence with a given total length, into a combination of a compressed arithmetic data code and an information code subsequent thereto, the data code having sequentially transmittable portions cooperative with each other to represent the original sequence of the input symbols, the information code carrying information on the total length of the original sequence, and the coding subsystem for transmitting any portion of the data code and the information code; and a decoding subsystem including: a code gate means passing any transmitted portion of the data code except a final one; an arithmetic decoding means decoding respective portions of the data code, as they are sequentially input thereto through the code gate means; and a decodable control means decoding the transmitted information code to provide the arithmetic decoding means with the information on the total length of the original sequence of the input symbols and controlling the code gate means to pass the final portion of the data code so that the arithmetic decoding means provided with the information decodes the final portion of the data code to thereby complete generating a set of bi-level symbols to be outputted from the system in the same sequence and with the same length as the input symbols; the code gate means includes a register means shifting any subsequence of the data bits in a transmitted turn thereof to input to the arithmetic decoding means, and the register means having a final subsequence of the data bits stored therein waiting to be inputted to the arithmetic decoding means; the arithmetic decoding means includes: an adaptive arithmetic decoding means decoding the sequence of the data bits inputted thereto into a long sequence of bi-level symbols starting with an according sequence with the original sequence of the input symbols; and a symbol output means sequentially outputting from the system while counting the bi-level symbols in the long sequence; the decodable control means informs the symbol output means of the total count of the input symbols and controls to flush the register means so that the symbol output means outputs the according sequence of the bi-level symbols out of the long sequence; the adaptive arithmetic decoding means includes a reduction type adaptive arithmetic decoder; and the final subsequence of the data bits represents an intermediate binary fraction between a lower bound and an upper bound of a final augend corresponding to a final symbol in the original sequence of the input symbols.