Patent US5554885A successfully refreshed from Google Patents.
US5554885A
Expired / Lapsed
US
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Semiconductor device including means for dispersing and absorbing tensile forces acting on film tape
Assignee: Seiko Epson Corp
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Filing: 1994-06-03
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Granted: 1996-09-10
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Expires: 2014-06-03
Abstract
Abstract A semiconductor device comprises an electrically insulating film having a device hole; a plurality of groups of leads, each group including of a large number of leads arranged in a predetermined pattern, in a plurality of lead formation regions on the surface of the film; an integrated circuit chip positioned within the device hole and with electrodes connected to inner lead portions of the leads; and a resin sealing portion that seals in at least the integrated circuit chip, the film, and the lead groups. The film comprises a first group of aperture portions including of aperture portions provided in regions outside the lead formation regions and a second group of aperture portions consisting of a plurality of aperture portions provided in the lead formation regions.
Inventors
- 👤 Yasuo Yamasaki
- 👤 Norikata Hama
- 👤 Munenori Kurasawa
- 👤 Nobuaki Hashimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:27
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/701; H10W40/00; H10W40/70; H10W40/77; H10W40/778; H10W70/00; H10W70/40; H10W70/453; H10W70/464; H10W70/466; H10W72/071; H10W72/077; H10W74/00; H10W74/10; H10W74/111; H10W74/121
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
216 words
A semiconductor device comprising: an electrically insulating film having a device hole and a plurality of lead formation regions around said device hole; a plurality of lead groups, each group including a large number of leads, arranged in a predetermined pattern that is formed in said plurality of lead formation regions on the surface of said film; an integrated circuit chip arranged within said device hole of said film and having electrodes connected to ends of said leads; and a resin sealing portion that seals in at least said integrated circuit chip, said film, and said lead groups; wherein said m comprises: means, formed in said film, for securing bonding between said film and said resin sealing portion and for dispersing and absorbing external tensile forces acting on said film to suppress deformation of said film; wherein said securing, dispersing and absorbing means includes a plurality of slit-shaped apertures, each slit-shaped aperture being provided in a region between two adjacent lead formation regions; a plurality of groups of aperture portions, each group being provided in each of said lead formation region; and a plurality of linking portions formed on said film between adjacent aperture portions in each group of aperture portions, such that stresses generated by the external tensile forces are dispersed along said linking portions.
Claim 2
Dependent Claim
216 words
A semiconductor device comprising: an electrically insulating film having a device hole and a plurality of lead formation regions around said device hole; a plurality of lead groups, each group including a large number of leads, arranged in a predetermined pattern that is formed in said plurality of lead formation regions on the surface of said film; an integrated circuit chip arranged within said device hole of said film and having electrodes connected to ends of said leads; and a resin sealing portion that seals in at least said integrated circuit chip, said film, and said lead groups; wherein said m comprises: means, formed in said film, for securing bonding between said film and said resin sealing portion and for dispersing and absorbing external tensile forces acting on said film to suppress deformation of said film; wherein said securing, dispersing and absorbing means includes a plurality of slit-shaped apertures, each slit-shaped aperture being provided in a region between two adjacent lead formation regions; a plurality of groups of aperture portions, each group being provided in each of said lead formation region; and a plurality of linking portions formed on said film between adjacent aperture portions in each group of aperture portions, such that stresses generated by the external tensile forces are dispersed along said linking portions.
Claim 3
Dependent Claim
58 words
The semiconductor device according to claim 1, wherein: each of said leads comprises an inner lead portion extending into said device hole and an outer lead linkage portion extending outward beyond said film, and said outer lead linkage portion is connected to an outer lead of a mechanical strength greater than that of said outer lead linkage portion.
Claim 4
Dependent Claim
26 words
The semiconductor device according to claim 1, wherein said linking portions are orientated such that their longitudinal directions intersect edges of said film at predetermined angles.
Claim 5
Dependent Claim
23 words
The semiconductor device according to claim 1, wherein: said linking portions are orientated such that their longitudinal directions are perpendicular to said leads.
Claim 6
Dependent Claim
29 words
The semiconductor device according to claim 1, wherein: said aperture portions of each group are arranged symmetrically in a lead formation region relative to the edges of said film.
Claim 7
Dependent Claim
23 words
The semiconductor device according to claim 1, wherein: said aperture portions of each group are positioned away from bent portions of said leads.
Claim 8
Dependent Claim
24 words
The semiconductor device according to claim 1, wherein: side leads positioned at the outermost sides of said leads are wider than the other leads.
Claim 9
Dependent Claim
27 words
The semiconductor device according to claim 1, wherein: said integrated circuit chip is positioned at substantially the center in the depthwise direction of said resin sealing portion.
Claim 10
Dependent Claim
36 words
The semiconductor device according to claim 8, wherein: the position of said integrated circuit chip is set by the depth of forming of an inner lead portion and an outer lead linkage portion of said leads.
Claim 11
Dependent Claim
33 words
The semiconductor device according to claim 8, wherein: the position of said integrated circuit chip is set by the depth of forming of an inner lead portion and outer leads of said leads.
Claim 12
Dependent Claim
48 words
The semiconductor device according to claim 1, further comprising: a resin layer having good adhesive properties with respect to said leads and said resin sealing portion, said resin layer being formed in a region encompassing inner lead portions of said leads and electrodes of said integrated circuit chip.
Claim 13
Dependent Claim
33 words
The semiconductor device according to claim 1, wherein each aperture portion has a longest edge with a length not greater than one half of the length of an edge of the device hole.
Claim 14
Dependent Claim
18 words
The semiconductor device according to claim 1, further comprising: a radiator portion attached to said integrated circuit chip.
Claim 15
Dependent Claim
17 words
The semiconductor device according to claim 13, wherein said radiator portion includes a plurality of aperture portions.
Claim 16
Dependent Claim
35 words
The semiconductor device according to claim 13, wherein: said radiator portion is disposed in said resin sealing portion and has one surface substantially in the same plane as one surface of said resin sealing portion.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-10 | 2000-03-11 | 2000-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-10 | 2004-03-11 | 2004-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-10 | 2008-03-11 | 2008-09-10 | $7700.00 | Window Closed / Lapsed |