US5554546A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating a high voltage transistor
Assignee: Texas Instruments Inc
•
Filing: 1995-10-17
•
Granted: 1996-09-10
•
Expires: 2015-10-17
Abstract
Abstract A high voltage transistor includes a semiconductor-on-insulator (SOI) region in which a source and a channel are formed. A drain drift region is further formed partly in the SOI region and partly in the bulk silicon region beyond SOI and a gate is coupled to said SOI channel.
Inventors
- 👤 Satwinder Malhi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/65; H10D30/657; H10D30/01; H10D30/021; H10D30/0221; H10D30/028; H10D30/0281; H10D30/601; H10D30/603; H10D30/67; H10D30/6704; H10D30/6727; H10D30/674; H10D30/6741; H10D30/6743; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D86/00; H10D86/201; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; Y; Y10; Y10S; Y10S148/00; Y10S148/126
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
181 words
A method for fabricating a semiconductor device comprising the steps of: providing a substrate having a first conductivity type; forming a body insulating layer in said substrate beneath a face of said substrate and spaced from said face; forming a first doped region of a second conductivity type, said first doped region extending from said face into said substrate to a depth equal to or greater than said insulating layer and surrounding said body insulating layer, thereby isolating a channel region of said substrate between said face, said body insulating layer and said first doped region; forming a first contact providing conductive contact to said first doped region; forming a second doped region in said channel region, said second doped region having said second conductivity type and said second doped region being spaced from said first doped region; forming a second contact providing conductive contact to said second doped region; forming a gate insulating layer on said face over the portion of said channel region between said first and second doped regions; and forming a gate on said gate insulating layer.
Claim 2
Independent Claim
181 words
A method for fabricating a semiconductor device comprising the steps of: providing a substrate having a first conductivity type; forming a body insulating layer in said substrate beneath a face of said substrate and spaced from said face; forming a first doped region of a second conductivity type, said first doped region extending from said face into said substrate to a depth equal to or greater than said insulating layer and surrounding said body insulating layer, thereby isolating a channel region of said substrate between said face, said body insulating layer and said first doped region; forming a first contact providing conductive contact to said first doped region; forming a second doped region in said channel region, said second doped region having said second conductivity type and said second doped region being spaced from said first doped region; forming a second contact providing conductive contact to said second doped region; forming a gate insulating layer on said face over the portion of said channel region between said first and second doped regions; and forming a gate on said gate insulating layer.
Claim 3
Dependent Claim
23 words
A method for forming a semiconductor device as in claim 1 wherein said first contact also provides conductive contact to said channel region.
Claim 4
Dependent Claim
42 words
A method for forming a semiconductor device as in claim 2 further comprising: forming a channel contact doped region in said channel region, said channel contact doped region having said first conductivity type and a higher dopant concentration than said channel region.
Claim 5
Dependent Claim
19 words
A method for forming a semiconductor device as in claim 1 wherein said body insulating layer comprises silicon dioxide.
Claim 6
Dependent Claim
23 words
A method for forming a semiconductor device as in claim 1 wherein said body insulating layer is 2 to 3μ beneath said face.
Claim 7
Dependent Claim
60 words
A method for forming a semiconductor device as in claim 1 wherein the steps for forming said second contact comprise; forming a third doped region of said second conductivity type in said first doped region and having a higher dopant concentration than said first doped region; and forming a conductor on said face in contact with said third doped region.
Claim 8
Dependent Claim
25 words
A method for forming a semiconductor device as in claim 1 wherein said first conductivity type is P and said second conductivity type is N.
Claim 9
Dependent Claim
20 words
A method for forming a semiconductor device as in claim 1 wherein said substrate is connected to a reference potential.
Claim 10
Independent Claim
193 words
A method for forming a semiconductor device comprising: providing a crystalline silicon substrate having a conductivity type of P; forming a body insulating layer of silicon dioxide in said substrate beneath a face of said substrate and spaced from said face; forming a first doped region of a conductivity type of N, said first doped region extending from said face into said substrate to a depth equal to or greater than said insulating layer and surrounding said body insulating layer, thereby isolating a channel region of said substrate between said face, said body insulating layer and said first doped region; forming a first contact providing conductive contact to said first doped region; forming a second doped region in said channel region, said second doped region having a conductivity type of N and said second doped region being spaced from said first doped region; forming a second contact providing conductive contact to said second doped region; forming a gate insulating layer of silicon dioxide on said face over the portion of said channel region between said first and second doped regions; and forming a gate of doped polycrystalline silicon on said gate insulating layer.
Claim 11
Independent Claim
193 words
A method for forming a semiconductor device comprising: providing a crystalline silicon substrate having a conductivity type of P; forming a body insulating layer of silicon dioxide in said substrate beneath a face of said substrate and spaced from said face; forming a first doped region of a conductivity type of N, said first doped region extending from said face into said substrate to a depth equal to or greater than said insulating layer and surrounding said body insulating layer, thereby isolating a channel region of said substrate between said face, said body insulating layer and said first doped region; forming a first contact providing conductive contact to said first doped region; forming a second doped region in said channel region, said second doped region having a conductivity type of N and said second doped region being spaced from said first doped region; forming a second contact providing conductive contact to said second doped region; forming a gate insulating layer of silicon dioxide on said face over the portion of said channel region between said first and second doped regions; and forming a gate of doped polycrystalline silicon on said gate insulating layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-10 | 2000-03-11 | 2000-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-10 | 2004-03-11 | 2004-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-10 | 2008-03-11 | 2008-09-10 | $7700.00 | Window Closed / Lapsed |