US5553306A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for controlling parallel port drivers in a data processing system
Assignee: International Business Machines Corp
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Filing: 1994-09-07
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Granted: 1996-09-03
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Expires: 2014-09-07
Abstract
Abstract A parallel port interface for utilization between a first device and a second device designated by a user for transmitting a digital signal from the device to the second device. The parallel port interface includes a switchable driver circuit for transmitting the digital signal, which includes a first circuit for emulating an open collector circuit and a second circuit for emulating a totem pole circuit. The switchable driver circuit is controlled by a logic control circuit that automatically selects either the first circuit or the second circuit for transmitting the digital signal in response to the digital signal and a designation of the second device.
Inventors
- 👤 Margaret Claffey-Cohen
- 👤 Phat T. Le
- 👤 Timothy J. Louie
- 👤 II Alan F. Neel
- 👤 James P. Ward
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:35
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4072
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
136 words
A parallel port interface for utilization between a first device and a second device for transmitting a digital signal between said first device and said second device, said parallel port interface comprising: a switchable driver circuit for transmitting said digital signal, said switchable driver circuit including: first circuit means for emulating an open collector circuit for providing active pull up; second circuit means for emulating a totem pole circuit for providing a high-impedance load; polling means for polling said second device to determine whether said second device is configured to receive digital signals from said first circuit means or said second circuit means; and a logic control circuit for automatically selecting either said first circuit means or said second circuit means for transmitting said digital signal in response to the determination made by said polling means.
Claim 2
Dependent Claim
136 words
A parallel port interface for utilization between a first device and a second device for transmitting a digital signal between said first device and said second device, said parallel port interface comprising: a switchable driver circuit for transmitting said digital signal, said switchable driver circuit including: first circuit means for emulating an open collector circuit for providing active pull up; second circuit means for emulating a totem pole circuit for providing a high-impedance load; polling means for polling said second device to determine whether said second device is configured to receive digital signals from said first circuit means or said second circuit means; and a logic control circuit for automatically selecting either said first circuit means or said second circuit means for transmitting said digital signal in response to the determination made by said polling means.
Claim 3
Dependent Claim
36 words
The parallel port interface of claim 1, wherein said polling means further includes means for polling said first device to determine whether said first device is capable of transmitting digital signals utilizing said second circuit means.
Claim 4
Dependent Claim
65 words
The parallel port interface of claim 2, wherein said first and second circuit means include: an invertor having an input for receiving a digital signal; a three-state logic circuit having an input coupled to an output of said invertor, an enable input for switching said three-state logic circuit between a open collector configuration and a totem pole configuration, and an output transmitting said digital signal.
Claim 5
Dependent Claim
68 words
The parallel port interface of claim 3, wherein said logic circuit includes an AND gate having a first input coupled to an output of said invertor and a second input for receiving a control signal, wherein said switchable driver circuit may transmit selectively transmit signals in a open collector configuration or a totem pole configuration in response said digital signal and a control signal from said polling means.
References Cited (Backward Citations)
US3824408A
Cited
US4251737A
Cited
US4339675A
Cited
US4339676A
Cited
US4490631A
Cited
US4841484A
Cited
US4912724A
Cited
US4825404A
Cited
US4721867A
Cited
US4801825A
Cited
US4833349A
Cited
US4991085A
Cited
US4987319A
Cited
US5212801A
Cited
US5122690A
Cited
US5239627A
Cited
US5132562A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-03 | 2000-03-04 | 2000-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-03 | 2004-03-04 | 2004-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-03 | 2008-03-04 | 2008-09-03 | $7700.00 | Window Closed / Lapsed |