Patent US5553041A successfully refreshed from Google Patents.
US5553041A
Expired / Lapsed
US
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Disc data reproducing apparatus and signal processing unit for preventing underflow and overflow
Assignee: Toshiba Corp
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Filing: 1995-04-10
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Granted: 1996-09-03
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Expires: 2015-04-10
Abstract
Abstract An apparatus, a signal processing circuit and a method for reproducing data stored on a disc to prevent a buffer memory from going overflow/underflow. Writing information data read from the disc to the buffer memory is performed in synchronism with a reproduction stage clock signal, and reading from the buffer memory is in synchronism with a signal processing stage clock. The signal processing stage clock for reading information data from the buffer memory is changed in accordance with the amount of information data stored in the buffer memory for preventing interruptions in data reproduction.
Inventors
- 👤 Jun Inagawa
- 👤 Masahide Nagumo
- 👤 Kunihiko Kodama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:59
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/10527; G06; G06F; G06F5/00; G06F5/06; G11B19/00; G11B19/02; G06F2205/00; G06F2205/06; G06F2205/061; G11B2020/1062; G11B2020/10814; G11B2020/10824; G11B7/00; G11B7/08; G11B7/09; G11B7/0946
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
218 words
An apparatus for reproducing information data stored on a disc comprising: means for reading out information data from a rotating disc on which the information data is stored; means for generating a digitized signal by quantizing the read out information data in accordance with a rotation of the disc; means for generating a first clock signal synchronous with the digitized signal; means for demodulating the digitized signal in synchronism with the first clock signal and for outputting a demodulated data; means for storing the demodulated data; means for generating a second clock signal having a frequency controlled in accordance with an amount of data stored in the storing means, wherein the amount of data stored in the storing means is represented by a difference between current read and write addresses of the storing means; and means for controlling a writing operation to the storing means in synchronism with the first clock signal and for controlling a reading operation from the storing means in synchronism with the second clock signal; wherein the second signal generating means includes first counting means for counting frames in the first clock signal as a first result, second counting means for counting frames in the second clock signal as a second result, and means for calculating a difference between the first and second results.
Claim 2
Independent Claim
218 words
An apparatus for reproducing information data stored on a disc comprising: means for reading out information data from a rotating disc on which the information data is stored; means for generating a digitized signal by quantizing the read out information data in accordance with a rotation of the disc; means for generating a first clock signal synchronous with the digitized signal; means for demodulating the digitized signal in synchronism with the first clock signal and for outputting a demodulated data; means for storing the demodulated data; means for generating a second clock signal having a frequency controlled in accordance with an amount of data stored in the storing means, wherein the amount of data stored in the storing means is represented by a difference between current read and write addresses of the storing means; and means for controlling a writing operation to the storing means in synchronism with the first clock signal and for controlling a reading operation from the storing means in synchronism with the second clock signal; wherein the second signal generating means includes first counting means for counting frames in the first clock signal as a first result, second counting means for counting frames in the second clock signal as a second result, and means for calculating a difference between the first and second results.
Claim 3
Dependent Claim
48 words
The apparatus according to claim 1 wherein the second clock generating means further includes: a plurality of clock generating means for generating a plurality of clock signals of different frequencies; and selecting means for selecting a clock signal among the plurality of clock signals according to the difference.
Claim 4
Dependent Claim
25 words
The apparatus according to claim 2 wherein each clock generating means among the plurality of clock generating means is activated by a different activating signal.
Claim 5
Dependent Claim
39 words
The apparatus according to claim 3 further comprising switching means for changing a speed of rotating a disc motor according to a supplied control signal wherein the different activating signals are changed by detecting edges of the control signal.
Claim 6
Independent Claim
221 words
An apparatus for reproducing a plurality of information data stored on a disc, the plurality of information data capable of being classified into at least one of a first type data and a second type data, the apparatus comprising: means for designating information data to be read among the plurality of information data and for designating one of the first and second types of data; pickup means for reading information data designated by the designating means; means for generating a first clock signal synchronous with the information data read from the disc; means for generating a second clock signal derived from constant clock signal; storing means for storing information data read from the disc; and control means for controlling an operation of writing the information data read from the disc to the storing means in synchronism with the first clock signal and for controlling a reading operation from the storing means in synchronism with a second clock signal; wherein, when the designated information data is the first type data, the second clock signal is derived with a frequency according to an amount of information data stored in the storing means, and when the designated information data is the second type data, the second clock signal is derived with a frequency independent of the amount of data stored in the storing means.
Claim 7
Independent Claim
221 words
An apparatus for reproducing a plurality of information data stored on a disc, the plurality of information data capable of being classified into at least one of a first type data and a second type data, the apparatus comprising: means for designating information data to be read among the plurality of information data and for designating one of the first and second types of data; pickup means for reading information data designated by the designating means; means for generating a first clock signal synchronous with the information data read from the disc; means for generating a second clock signal derived from constant clock signal; storing means for storing information data read from the disc; and control means for controlling an operation of writing the information data read from the disc to the storing means in synchronism with the first clock signal and for controlling a reading operation from the storing means in synchronism with a second clock signal; wherein, when the designated information data is the first type data, the second clock signal is derived with a frequency according to an amount of information data stored in the storing means, and when the designated information data is the second type data, the second clock signal is derived with a frequency independent of the amount of data stored in the storing means.
Claim 8
Dependent Claim
22 words
The apparatus according to claim 5 wherein the first type data includes ROM data and the second type data includes audio data.
Claim 9
Dependent Claim
186 words
A signal processing circuit for use in processing in processing information data read from a disc, comprising: a first clock circuit for generating a first clock signal synchronous with a digitized signal generated by quantizing the information data in accordance with a rotation of the disc; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a second clock circuit for generating a second clock signal derived from a constant clock signal, the second clock circuit comprising a plurality of clock generating means for generating a plurality of clock signals of different frequencies from the constant clock signal, and selecting means for selecting the second clock signal from the plurality of generated clock signals; a buffer memory for storing the demodulated data: and a control circuit for controlling a writing operation to the buffer memory in accordance with the first clock signal and a reading operation from the buffer memory in accordance with the second clock signal, wherein the second clock signal is selected in accordance with an amount of data stored in the buffer memory.
Claim 10
Dependent Claim
186 words
A signal processing circuit for use in processing in processing information data read from a disc, comprising: a first clock circuit for generating a first clock signal synchronous with a digitized signal generated by quantizing the information data in accordance with a rotation of the disc; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a second clock circuit for generating a second clock signal derived from a constant clock signal, the second clock circuit comprising a plurality of clock generating means for generating a plurality of clock signals of different frequencies from the constant clock signal, and selecting means for selecting the second clock signal from the plurality of generated clock signals; a buffer memory for storing the demodulated data: and a control circuit for controlling a writing operation to the buffer memory in accordance with the first clock signal and a reading operation from the buffer memory in accordance with the second clock signal, wherein the second clock signal is selected in accordance with an amount of data stored in the buffer memory.
Claim 11
Dependent Claim
39 words
The signal processing circuit according to claim 7 wherein the amount of data stored in the buffer memory is represented by a difference between a writing address for the buffer memory and a reading address for the buffer memory.
Claim 12
Independent Claim
145 words
A method for reproducing information data stored on a disc comprising: reading out information data from a rotating disc on which the information data is stored: generating a digitized signal by quantizing the information data in accordance with a rotation of the disc: generating a first clock signal synchronous with the digitized signal; demodulating the digitized signal in synchronism with the first clock signal and outputting demodulated data; generating a plurality of second clock signals having different frequencies; storing the demodulated data in synchronism with the first clock signal to a memory; selecting one of the plurality of generated second clock signals; reading the demodulated data stored in the memory in synchronism with the selected second clock signal; and changing the selection of the one of the plurality generated second clock signals in accordance with an amount of the demodulated data stored in the memory.
Claim 13
Independent Claim
145 words
A method for reproducing information data stored on a disc comprising: reading out information data from a rotating disc on which the information data is stored: generating a digitized signal by quantizing the information data in accordance with a rotation of the disc: generating a first clock signal synchronous with the digitized signal; demodulating the digitized signal in synchronism with the first clock signal and outputting demodulated data; generating a plurality of second clock signals having different frequencies; storing the demodulated data in synchronism with the first clock signal to a memory; selecting one of the plurality of generated second clock signals; reading the demodulated data stored in the memory in synchronism with the selected second clock signal; and changing the selection of the one of the plurality generated second clock signals in accordance with an amount of the demodulated data stored in the memory.
Claim 14
Independent Claim
213 words
An apparatus for reproducing information data stored on a disc comprising: an optical pickup for reading out information data from a rotating disc on which the information data is stored; a digitized signal generator for generating a digitized signal by quantizing the read out information data in accordance with a rotation of the disc; a first clock signal generator for generating a first clock signal synchronous with the digitized signal; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a buffer memory for storing the demodulated data; a second clock signal generator for generating a second clock signal from a constant clock, the second clock signal having a frequency controlled in accordance with an amount of data stored in the buffer memory, the second clock signal generator including a plurality of clock dividers for generating a plurality of divided clock signals of different frequencies and a selector for selecting one of the divided clock signals as the second clock signal according to the amount of data; and a controller for controlling a writing operation to the buffer memory in synchronism with the first clock signal and to control a reading operation from the buffer memory in synchronism with the second clock signal.
Claim 15
Independent Claim
213 words
An apparatus for reproducing information data stored on a disc comprising: an optical pickup for reading out information data from a rotating disc on which the information data is stored; a digitized signal generator for generating a digitized signal by quantizing the read out information data in accordance with a rotation of the disc; a first clock signal generator for generating a first clock signal synchronous with the digitized signal; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a buffer memory for storing the demodulated data; a second clock signal generator for generating a second clock signal from a constant clock, the second clock signal having a frequency controlled in accordance with an amount of data stored in the buffer memory, the second clock signal generator including a plurality of clock dividers for generating a plurality of divided clock signals of different frequencies and a selector for selecting one of the divided clock signals as the second clock signal according to the amount of data; and a controller for controlling a writing operation to the buffer memory in synchronism with the first clock signal and to control a reading operation from the buffer memory in synchronism with the second clock signal.
Claim 16
Dependent Claim
211 words
A signal processing circuit for use in processing information data read from a disc, comprising: a first clock circuit for generating a first clock signal synchronous with a digitized signal generated by quantizing the information data in accordance with a rotation of the disc; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a second clock circuit for generating a second clock signal from a constant clock signal, the second clock signal including a plurality of clock dividers for generating a plurality of divided clock signals of different frequencies and a selector for selecting one of the divided clock signals as the second clock signal; a buffer memory for storing the demodulated data; and a control circuit for controlling a writing operation to the buffer memory in accordance with the first clock signal and to control a reading operation from the buffer memory in accordance with the second clock signal, wherein the selector selects the one of the divided clock signals as the second clock signal based on an amount of data stored in the buffer memory so that a frequency of the second clock signal is controlled in accordance with the amount of data stored in the buffer memory.
Claim 17
Dependent Claim
211 words
A signal processing circuit for use in processing information data read from a disc, comprising: a first clock circuit for generating a first clock signal synchronous with a digitized signal generated by quantizing the information data in accordance with a rotation of the disc; a demodulator for demodulating the digitized signal in synchronism with the first clock signal and to output a demodulated data; a second clock circuit for generating a second clock signal from a constant clock signal, the second clock signal including a plurality of clock dividers for generating a plurality of divided clock signals of different frequencies and a selector for selecting one of the divided clock signals as the second clock signal; a buffer memory for storing the demodulated data; and a control circuit for controlling a writing operation to the buffer memory in accordance with the first clock signal and to control a reading operation from the buffer memory in accordance with the second clock signal, wherein the selector selects the one of the divided clock signals as the second clock signal based on an amount of data stored in the buffer memory so that a frequency of the second clock signal is controlled in accordance with the amount of data stored in the buffer memory.
Claim 18
Dependent Claim
212 words
A signal processing circuit for use in reproducing designated information data to be read from a plurality of information data stored on a disc, the plurality of information data capable of being classified into at least one of a first type data and a second type data, the signal processing circuit comprising: a first clock circuit for generating a first clock signal synchronous with the designated information data read from the disc; a second clock circuit for generating a second clock signal derived from a constant clock signal; a buffer memory for storing the designated information data read from the disc; and a control circuit for controlling writing the designated information data read from the disc to the buffer memory in synchronism with the first clock signal and to control a reading operation from the buffer memory in synchronism with the second clock signal, wherein when the designated information data is the first type data, the second clock signal is derived with a frequency according to an amount of the first type data stored in the buffer memory, and when the designated information data is the second type data, the second clock signal is derived with a frequency independent of an amount of the second type data stored in the buffer memory.
Claim 19
Dependent Claim
212 words
A signal processing circuit for use in reproducing designated information data to be read from a plurality of information data stored on a disc, the plurality of information data capable of being classified into at least one of a first type data and a second type data, the signal processing circuit comprising: a first clock circuit for generating a first clock signal synchronous with the designated information data read from the disc; a second clock circuit for generating a second clock signal derived from a constant clock signal; a buffer memory for storing the designated information data read from the disc; and a control circuit for controlling writing the designated information data read from the disc to the buffer memory in synchronism with the first clock signal and to control a reading operation from the buffer memory in synchronism with the second clock signal, wherein when the designated information data is the first type data, the second clock signal is derived with a frequency according to an amount of the first type data stored in the buffer memory, and when the designated information data is the second type data, the second clock signal is derived with a frequency independent of an amount of the second type data stored in the buffer memory.
Claim 20
Dependent Claim
45 words
A signal processing circuit according to claim 12, wherein the second clock circuit includes a plurality of clock dividers for generating a plurality of clock signals of different frequencies and a selector to select one of the divided clock signals as the second clock signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-03 | 2000-03-04 | 2000-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-03 | 2004-03-04 | 2004-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-03 | 2008-03-04 | 2008-09-03 | $7700.00 | Window Closed / Lapsed |