US5552344A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Non-etchback self-aligned via size reduction method employing ozone assisted chemical vapor deposited silicon oxide
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1995-11-16
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Granted: 1996-09-03
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Expires: 2015-11-16
Abstract
Abstract A method for forming a narrow cross-sectional diameter via through an insulator layer for use within an integrated circuit. Formed upon a semiconductor substrate is a metal layer. At least the top surface of the metal layer is formed from a titanium nitride layer. Formed upon the titanium nitride layer is an insulator layer. The insulator layer exhibits a first incubation time with respect to forming an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the insulator layer. The first incubation time is less than a second incubation time for forming the same ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the titanium nitride layer. A conventional via is then formed completely through the insulator layer. The bottom of the conventional via exposes a portion of the titanium nitride layer. Formed upon the surface of the insulator layer and upon the edges of the insulator layer exposed within the conventional via is an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating. The ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is deposited for a deposition time greater than the first incubation time, but no greater than the second incubation time.
Inventors
- 👤 Syun-Ming Jang
- 👤 Chen-Hua D. Yu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 19:31
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/69215; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6336; H10W; H10W20/00; H10W20/01; H10W20/071
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
193 words
A method for forming an insulator layer having a cross-sectional diameter via formed there-through for use within an integrated circuit comprising: forming upon a semiconductor substrate a metal layer, at least the top surface of the metal layer being formed from a titanium nitride layer; forming upon the titanium nitride layer an insulator layer, the insulator layer exhibiting a first incubation time with respect to forming an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the insulator layer, the first incubation time being less than a second incubation time for forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the titanium nitride layer; forming completely through the insulator layer a via, the bottom of the via exposing a portion of the titanium nitride layer; forming upon the surface of the insulator layer and upon the edges of the insulator layer exposed in the via the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating being deposited for a deposition time greater than the first incubation time, but no greater than the second incubation time.
Claim 2
Independent Claim
193 words
A method for forming an insulator layer having a cross-sectional diameter via formed there-through for use within an integrated circuit comprising: forming upon a semiconductor substrate a metal layer, at least the top surface of the metal layer being formed from a titanium nitride layer; forming upon the titanium nitride layer an insulator layer, the insulator layer exhibiting a first incubation time with respect to forming an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the insulator layer, the first incubation time being less than a second incubation time for forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the titanium nitride layer; forming completely through the insulator layer a via, the bottom of the via exposing a portion of the titanium nitride layer; forming upon the surface of the insulator layer and upon the edges of the insulator layer exposed in the via the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating being deposited for a deposition time greater than the first incubation time, but no greater than the second incubation time.
Claim 3
Dependent Claim
21 words
The method of claim 1 wherein the thickness of the titanium nitride layer is from about 1000 to about 1400 angstroms.
Claim 4
Dependent Claim
20 words
The method of claim 1 wherein the titanium nitride layer is formed through a Physical Vapor Deposition (PVD) sputtering method.
Claim 5
Dependent Claim
20 words
The method of claim 1 wherein the thickness of the insulator layer is from about 15000 to about 20000 angstroms.
Claim 6
Dependent Claim
51 words
The method of claim 1 wherein the insulator layer is formed from an insulator material chosen from the group of insulator materials consisting of silicon oxide insulator materials formed through a Plasma Enhanced Chemical Vapor Deposition (PECVD) process and silicon oxide insulator materials formed through a Chemical Vapor Deposition (CVD) process.
Claim 7
Dependent Claim
19 words
The method of claim 1 wherein the width of the via is from about 4000 to about 8000 angstroms.
Claim 8
Dependent Claim
28 words
The method of claim 1 wherein the thickness of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is from about 500 to about 1300 angstroms.
Claim 9
Dependent Claim
28 words
The method of claim 1 wherein the thickness of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is from about 1300 to about 1500 angstroms.
Claim 10
Dependent Claim
28 words
The method of claim 1 wherein the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating employs Tetra Ethyl Ortho Silicate (TEOS) as the silicon source material.
Claim 11
Dependent Claim
30 words
The method of claim 9 wherein the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is formed at an ozone:TEOS molar ratio of about 12:1 to about 20:1.
Claim 12
Dependent Claim
31 words
The method of claim 1 wherein the first incubation time is from about 15 to about 20 seconds and the second incubation time is from about 50 to about 55 seconds.
Claim 13
Independent Claim
214 words
A method for forming an integrated circuit having an insulator layer formed therein, the insulator layer having a cross-sectional diameter via formed there-through comprising: forming within and upon a semiconductor substrate an integrated circuit comprising a minimum of one field effect transistor; forming upon the semiconductor substrate a metal layer, at least the top surface of the metal layer being formed from a titanium nitride layer; forming upon the titanium nitride layer an insulator layer, the insulator layer exhibiting a first incubation time with respect to forming an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the insulator layer, the first incubation time being less than a second incubation time for forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the titanium nitride layer; forming completely through the insulator layer a via, the bottom of the via exposing a portion of the titanium nitride layer; forming upon the surface of the insulator layer and upon the edges of the insulator layer exposed in the via the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating being deposited for a deposition time greater than the first incubation time, but no greater than the second incubation time.
Claim 14
Independent Claim
214 words
A method for forming an integrated circuit having an insulator layer formed therein, the insulator layer having a cross-sectional diameter via formed there-through comprising: forming within and upon a semiconductor substrate an integrated circuit comprising a minimum of one field effect transistor; forming upon the semiconductor substrate a metal layer, at least the top surface of the metal layer being formed from a titanium nitride layer; forming upon the titanium nitride layer an insulator layer, the insulator layer exhibiting a first incubation time with respect to forming an ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the insulator layer, the first incubation time being less than a second incubation time for forming the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating upon the titanium nitride layer; forming completely through the insulator layer a via, the bottom of the via exposing a portion of the titanium nitride layer; forming upon the surface of the insulator layer and upon the edges of the insulator layer exposed in the via the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating, the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating being deposited for a deposition time greater than the first incubation time, but no greater than the second incubation time.
Claim 15
Dependent Claim
36 words
The method of claim 12 wherein the thickness of the titanium nitride layer is from about 1000 to about 1400 angstroms, and the titanium nitride layer is formed through a Physical Vapor Deposition (PVD) sputtering method.
Claim 16
Dependent Claim
20 words
The method of claim 12 wherein the thickness of the insulator layer is from about 15000 to about 20000 angstroms.
Claim 17
Dependent Claim
51 words
The method of claim 12 wherein the insulator layer is formed from an insulator material chosen from the group of insulator materials consisting of silicon oxide insulator materials formed through a Plasma Enhanced Chemical Vapor Deposition (PECVD) process and silicon oxide insulator materials formed through a Chemical Vapor Deposition (CVD) process.
Claim 18
Dependent Claim
19 words
The method of claim 12 wherein the width of the via is from about 4000 to about 8000 angstroms.
Claim 19
Dependent Claim
28 words
The method of claim 12 wherein the thickness of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is from about 500 to about 1300 angstroms.
Claim 20
Dependent Claim
28 words
The method of claim 12 wherein the thickness of the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is from about 1300 to about 1500 angstroms.
Claim 21
Dependent Claim
28 words
The method of claim 12 wherein the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating employs Tetra Ethyl Ortho Silicate (TEOS) as the silicon source material.
Claim 22
Dependent Claim
30 words
The method of claim 19 wherein the ozone assisted Chemical Vapor Deposited (CVD) silicon oxide insulator coating is formed at an ozone:TEOS molar ratio of about 12:1 to about 20:1.
Claim 23
Dependent Claim
31 words
The method of claim 12 wherein the first incubation time is from about 15 to about 20 seconds and the second incubation time is from about 50 to about 55 seconds.
References Cited (Backward Citations)
US4988643A
Cited
US5342808A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-09-03 | 2000-03-04 | 2000-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-09-03 | 2004-03-04 | 2004-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-09-03 | 2008-03-04 | 2008-09-03 | $7700.00 | Window Closed / Lapsed |