Self-aligning metal interconnect fabrication

Claim 1

A method of forming a bridging interconnect between a current-carrying region of a transistor and a connection conductor so that said interconnect crosses without electrically contacting an intermediate noncontacting conductor, said current-carrying region being formed in a semiconductor substrate, said connection conductor and said noncontacting conductor being formed on said substrate, said method comprising the steps of: (a) at least partially covering said connection conductor with an oxide-retarding material which inhibits the growth of an oxide on said conductor; (b) growing an oxide on the structure defined by step (a) so as to form a relatively thick oxide cover over said noncontracting conductor, and a relatively thin oxide over said current-carrying region; (c) etching the oxide grown in step (b) sufficiently to remove oxide from over said current-carrying region while limiting etching so that said relatively thick oxide cover over said noncontacting conductor is not completely removed; (d) at least partially removing said oxide-retarding material from over said connection conductor; (e) depositing a sinterable metal over the structure defined by step (d); (f) sintering the sinterable metal deposited in step (e) so that it sinters with said current-carrying region and said connection conductor, said metal not sintering where it contacts oxide; (g) removing unsintered metal; and (h) defining a conductor extending from sintered metal over said current-carrying region to over said connection conductor; whereby, said sintered metal electrically connects said current-carrying region and said connection conductor, while remaining insulated from said noncontacting conductor by oxide grown in step (b) and not removed in step (c).

Claim 2

A method of forming a bridging interconnect between a current-carrying region of a transistor and a connection conductor so that said interconnect crosses without electrically contacting an intermediate noncontacting conductor, said current-carrying region being formed in a semiconductor substrate, said connection conductor and said noncontacting conductor being formed on said substrate, said method comprising the steps of: (a) at least partially covering said connection conductor with an oxide-retarding material which inhibits the growth of an oxide on said conductor; (b) growing an oxide on the structure defined by step (a) so as to form a relatively thick oxide cover over said noncontracting conductor, and a relatively thin oxide over said current-carrying region; (c) etching the oxide grown in step (b) sufficiently to remove oxide from over said current-carrying region while limiting etching so that said relatively thick oxide cover over said noncontacting conductor is not completely removed; (d) at least partially removing said oxide-retarding material from over said connection conductor; (e) depositing a sinterable metal over the structure defined by step (d); (f) sintering the sinterable metal deposited in step (e) so that it sinters with said current-carrying region and said connection conductor, said metal not sintering where it contacts oxide; (g) removing unsintered metal; and (h) defining a conductor extending from sintered metal over said current-carrying region to over said connection conductor; whereby, said sintered metal electrically connects said current-carrying region and said connection conductor, while remaining insulated from said noncontacting conductor by oxide grown in step (b) and not removed in step (c).

Claim 3

A method of forming an electrical interconnect between a first element consisting of a first material and a second element consisting of a second material while protecting a third element consisting of said second material from shorting to said electrical interconnect, said first element, said second element and said third element being formed on a substrate, said method comprising: (a) selecting said second material to be one on which an oxide layer can be thermally grown substantially faster than an oxide layer can be thermally grown on said first material under the same conditions; (b) covering said second element with a cover material upon which oxide growth under said conditions is at most as fast as on said first material, said cover material being patterned lithographically so as not to cover said third element; (c) thermally growing an oxide layer on the structure defined by step (b); (d) etching away sufficient oxide grown in step (c) so as to at least partially expose said first element while leaving oxide over said third element and etching said cover material so that said second element is at least partially exposed; (e) depositing a sinterable metal over the structure defined by step (d) and sintering said sinterable metal so that it binds with said first element and said second element, but not with the oxide covering said third element; (f) etching said sinterable metal deposited in step (e) so as to remove it from over said third element; and (g) forming a conductive interconnect between said first element and said second element, said interconnect being defined lithographically; whereby, said first element is electrically connected to said second element and said third element is electrically insulated from said interconnect by the oxide grown in step (c) and left after step (d).

Claim 4

A method of forming an electrical interconnect between a first element consisting of a first material and a second element consisting of a second material while protecting a third element consisting of said second material from shorting to said electrical interconnect, said first element, said second element and said third element being formed on a substrate, said method comprising: (a) selecting said second material to be one on which an oxide layer can be thermally grown substantially faster than an oxide layer can be thermally grown on said first material under the same conditions; (b) covering said second element with a cover material upon which oxide growth under said conditions is at most as fast as on said first material, said cover material being patterned lithographically so as not to cover said third element; (c) thermally growing an oxide layer on the structure defined by step (b); (d) etching away sufficient oxide grown in step (c) so as to at least partially expose said first element while leaving oxide over said third element and etching said cover material so that said second element is at least partially exposed; (e) depositing a sinterable metal over the structure defined by step (d) and sintering said sinterable metal so that it binds with said first element and said second element, but not with the oxide covering said third element; (f) etching said sinterable metal deposited in step (e) so as to remove it from over said third element; and (g) forming a conductive interconnect between said first element and said second element, said interconnect being defined lithographically; whereby, said first element is electrically connected to said second element and said third element is electrically insulated from said interconnect by the oxide grown in step (c) and left after step (d).

Claim 5

A method of forming a electrically conductive bridge between a region of a crystalline semiconductor surface and a connecting conductor formed over said surface so that said bridge is electrically insulated from an intermediate non-connecting conductor, said method comprising: (a) photolithographically form a silicon nitride cover which at least partially covers said connecting conductor, at most partially covers said region, and negligibly covers said non-connecting conductor; (b) thermally growing silicon dioxide over the structure resulting from step (a) whereby a relatively thick layer of silicon dioxide is formed over said non-connecting conductor, a relatively thin layer of silicon dioxide is formed over said region, and at most negligible silicon dioxide is formed over said nitride cover; (c) etching off said silicon nitride cover and implanting dopant into said region; (d) etching said silicon dioxide sufficiently to expose said region while leaving a thickness of silicon dioxide over said non-connecting conductor; (e) depositing a silicidable metal over the structure resulting from step (d); (f) sintering said silicidable metal so that a silicide is formed over said region and said connecting conductor; and (g) photolithographically forming a conductive bridge extending between said region and said connecting conductor; whereby, said region is electrically connected to said connecting conductor and electrically insulated from said non-conducting layer by the silicon dioxide remaining after step (d).

Claim 6

A method of forming a electrically conductive bridge between a region of a crystalline semiconductor surface and a connecting conductor formed over said surface so that said bridge is electrically insulated from an intermediate non-connecting conductor, said method comprising: (a) photolithographically form a silicon nitride cover which at least partially covers said connecting conductor, at most partially covers said region, and negligibly covers said non-connecting conductor; (b) thermally growing silicon dioxide over the structure resulting from step (a) whereby a relatively thick layer of silicon dioxide is formed over said non-connecting conductor, a relatively thin layer of silicon dioxide is formed over said region, and at most negligible silicon dioxide is formed over said nitride cover; (c) etching off said silicon nitride cover and implanting dopant into said region; (d) etching said silicon dioxide sufficiently to expose said region while leaving a thickness of silicon dioxide over said non-connecting conductor; (e) depositing a silicidable metal over the structure resulting from step (d); (f) sintering said silicidable metal so that a silicide is formed over said region and said connecting conductor; and (g) photolithographically forming a conductive bridge extending between said region and said connecting conductor; whereby, said region is electrically connected to said connecting conductor and electrically insulated from said non-conducting layer by the silicon dioxide remaining after step (d).

Claim 7

A method of forming a metal-on-silicon transistor with a bridge between a source/drain region and a source/drain conductor so that said bridge extends over but is electrically insulated from a non-connecting conductor, said method comprising: (a) forming a structure including a crystalline silicon substrate, a device region within said substrate, a thin layer of oxide over said source/drain region, and a gate pedestal over said device region, said gate pedestal defining an underlying gate region which divides said device region into a source region and a drain region; (b) photolithographically defining a nitride cover which at least partially covers said source/drain conductor, at most partially covers said source/drain region, and at most negligibly covers said non-connecting cover and said gate pedestal; (c) thermally growing silicon dioxide over the structure resulting from step (b), whereby a relatively thick layer of silicon dioxide is formed over said gate pedestal and said source/drain conductor, a relatively thin layer of silicon dioxide is formed over said source/drain region, and negligible silicon dioxide is formed over said nitride cover; (d) etching off said nitride cover and implanting dopant into said source/drain region; (e) etching said silicon dioxide sufficiently to expose said source/drain region while leaving a silicon dioxide layer over said gate pedestal and said source/drain conductor; (f) depositing a silicidable metal over the structure resulting after step (e); (g) sintering said silicidable metal so as to form a silicide over said source/drain region; and (h) photolithographically patterning said silicidable metal so as to define a conductive bridge between said source/drain region and said source/drain conductor; whereby, said bridge electrically connects said source/drain region and said source/drain conductor, while said gate pedestal and said non-connecting conductor remain insulated by said bridge by silicon dioxide left after step (e).

Claim 8

A method of forming a metal-on-silicon transistor with a bridge between a source/drain region and a source/drain conductor so that said bridge extends over but is electrically insulated from a non-connecting conductor, said method comprising: (a) forming a structure including a crystalline silicon substrate, a device region within said substrate, a thin layer of oxide over said source/drain region, and a gate pedestal over said device region, said gate pedestal defining an underlying gate region which divides said device region into a source region and a drain region; (b) photolithographically defining a nitride cover which at least partially covers said source/drain conductor, at most partially covers said source/drain region, and at most negligibly covers said non-connecting cover and said gate pedestal; (c) thermally growing silicon dioxide over the structure resulting from step (b), whereby a relatively thick layer of silicon dioxide is formed over said gate pedestal and said source/drain conductor, a relatively thin layer of silicon dioxide is formed over said source/drain region, and negligible silicon dioxide is formed over said nitride cover; (d) etching off said nitride cover and implanting dopant into said source/drain region; (e) etching said silicon dioxide sufficiently to expose said source/drain region while leaving a silicon dioxide layer over said gate pedestal and said source/drain conductor; (f) depositing a silicidable metal over the structure resulting after step (e); (g) sintering said silicidable metal so as to form a silicide over said source/drain region; and (h) photolithographically patterning said silicidable metal so as to define a conductive bridge between said source/drain region and said source/drain conductor; whereby, said bridge electrically connects said source/drain region and said source/drain conductor, while said gate pedestal and said non-connecting conductor remain insulated by said bridge by silicon dioxide left after step (e).