Combined JFET and MOS transistor device, circuit

Claim 1

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a source diffusion region of a second conductivity type formed in the semiconductor substrate; a drain diffusion region of the second conductivity type formed in the semiconductor substrate and laterally separated from the source diffusion region; a first layer of insulating material formed on the semiconductor substrate, between the source and drain diffusion regions; a first gate electrode formed on the first layer of insulating material, the first gate electrode having side surfaces; a layer of insulating material formed on each side surface for electrically isolating the first gate electrode; a junction field effect transistor (JFET) gate electrode of the first conductivity type deposited on the semiconductor substrate, said JFET gate electrode being immediately contiguous to the insulating layers formed on the side surfaces of the MOS gate electrode and immediately contiguous to the substrate surface; and first and second lightly doped drain regions formed in the substrate between the source and drain diffusion regions and immediately contiguous with the JFET gate electrode to form JFET gate junctions.