Amplifier with a function for switching on and off the output signal

Claim 2

An amplifier with a function for switching on and off its output signal, comprising: an inverted Darlington circuit made up of an input transistor and an output transistor; a first switching circuit connected across the base and the emitter of the output transistor; and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor.

Claim 3

An amplifier according to claim 1, further comprising means for opening the first switching circuit and closing the second switching circuit to send out an output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal.

Claim 4

An amplifier according to claim 1, wherein the intensity of the current that flows through the switching circuits is not higher than half that of the output current of the amplifier.

Claim 5

An amplifier according to claim 1, and further comprising a second inverted Darlington circuit, wherein said first-mentioned and second inverted Darlington circuits are connected in a push-pull circuit arrangement.

Claim 6

An amplifier according to claim 1, wherein said output signal is used to drive one of a group consisting of a CMOS unit and a TTL circuit.

Claim 7

An amplifier according to claim 1, wherein said inverted Darlington circuit and said first and second switching elements are formed in an monolithic IC single chip.

Claim 8

An amplifier according to claim 1, wherein said second switching circuit comprises a diode bridge circuit.

Claim 9

A semiconductor device testing system comprising: a timing signal generator; a pattern generator; a waveform formatter connected to receive a timing signal generated by the timing signal generator and a test pattern generated by the pattern generator; a driver, with an I/O switching function, that is connected to receive an output signal of the waveform formatter and a control signal that causes its output impedance to increase when a sample device to be tested provides an output signal; a transmission line for transmitting an output testing signal of the driver to the sample device; an analog comparator connected to receive an output signal provided by the sample device in response to the testing signal supplied through the transmission line for comparing the output signal provided by the sample device with a reference voltage; and a digital comparator that compares an output signal of the analog comparator and an expected value generated by the pattern generator for logical comparison at a time specified by a timing signal generated by the timing signal generator; said driver including an inverted Darlington circuit made up of an input transistor and an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor, said first and second switching circuits being connected to receive said control signal to control the I/O switching function of said driver.

Claim 10

A semiconductor device testing system comprising: a timing signal generator; a pattern generator; a waveform formatter connected to receive a timing signal generated by the timing signal generator and a test pattern generated by the pattern generator; a driver, with an I/O switching function, that is connected to receive an output signal of the waveform formatter and a control signal that causes its output impedance to increase when a sample device to be tested provides an output signal; a transmission line for transmitting an output testing signal of the driver to the sample device; an analog comparator connected to receive an output signal provided by the sample device in response to the testing signal supplied through the transmission line for comparing the output signal provided by the sample device with a reference voltage; and a digital comparator that compares an output signal of the analog comparator and an expected value generated by the pattern generator for logical comparison at a time specified by a timing signal generated by the timing signal generator; said driver including an inverted Darlington circuit made up of an input transistor and an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor, said first and second switching circuits being connected to receive said control signal to control the I/O switching function of said driver.

Claim 11

An amplifier with a function for switching on and off its output signal comprising: an inverted Darlington circuit which includes an input transistor and an output transistor; a first switching circuit connected across a gate and a source of the output transistor; and a second switching circuit connected between a source of the input transistor and a drain of the output transistor.

Claim 12

An amplifier with a function for switching on and off its output signal comprising: an inverted Darlington circuit which includes an input transistor and an output transistor; a first switching circuit connected across a gate and a source of the output transistor; and a second switching circuit connected between a source of the input transistor and a drain of the output transistor.

Claim 13

The amplifier recited in claim 9, further comprising: means for opening the first switching circuit and closing the second switching circuit to send out an output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal.

Claim 14

The amplifier recited in claim 9, wherein said input and output transistors are fabricated using CMOS technology.

Claim 15

The amplifier recited in claim 9, wherein said second switching circuit comprises a diode bridge circuit.

Claim 16

The amplifier recited in claim 9, further comprising: a second inverted Darlington circuit, wherein said first-mentioned and said second inverted Darlington circuits are connected in a push-pull circuit arrangement.

Claim 17

The amplifier recited in claim 9, wherein the amplifier is formed on a single IC chip.

Claim 18

A power amplifier circuit, comprising: an amplifier circuit having an inverted Darlington circuit which includes an input transistor in an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor; and a current monitoring circuit for monitoring the output signal of said amplifier circuit, said circuit monitoring circuit having an input terminal for receiving the output signal, a control terminal connected to the first and second switching circuits of said amplifier circuit, and means for providing a signal on said control terminal for closing said first switching means and opening said second switching means when said output signal of said amplifier circuit exceeds a predetermined limit.

Claim 19

A power amplifier circuit, comprising: an amplifier circuit having an inverted Darlington circuit which includes an input transistor in an output transistor, a first switching circuit connected across the base and the emitter of the output transistor, and a second switching circuit connected between the emitter of the input transistor and the collector of the output transistor; and a current monitoring circuit for monitoring the output signal of said amplifier circuit, said circuit monitoring circuit having an input terminal for receiving the output signal, a control terminal connected to the first and second switching circuits of said amplifier circuit, and means for providing a signal on said control terminal for closing said first switching means and opening said second switching means when said output signal of said amplifier circuit exceeds a predetermined limit.

Claim 20

The power amplifier circuit recited in claim 15, further comprising: means for opening the first switching circuit and closing the second switching circuit to send out the output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal.

Claim 21

The power amplifier circuit recited in claim 15, further comprising: a second inverted Darlington circuit, wherein said first-mentioned and said second inverted Darlington circuits are connected in a push-pull circuit arrangement.

Claim 22

The power amplifier circuit recited in claim 15, wherein said second switching circuit comprises a diode bridge circuit.

Claim 23

The power amplifier circuit recited in claim 15, wherein the power amplifier circuit is formed on a single IC chip.

Claim 24

A power amplifier circuit, comprising: an amplifier circuit having an inverted Darlington circuit which includes an input transistor and an output transistor, a first switching circuit connected across a gate and a source of the output transistor, and a second switching circuit connected between a source of the input transistor and a drain of the output transistor; and a current monitoring circuit for monitoring an output signal of said amplifier circuit, said current monitoring circuit having an input terminal for receiving the output signal, a control terminal connected to the first and second switching circuits of said amplifier circuit, and means for providing a signal on said control terminal for closing said first switching means and for opening said second switching means when the output signal of said amplifier circuit exceeds a predetermined limit.

Claim 25

A power amplifier circuit, comprising: an amplifier circuit having an inverted Darlington circuit which includes an input transistor and an output transistor, a first switching circuit connected across a gate and a source of the output transistor, and a second switching circuit connected between a source of the input transistor and a drain of the output transistor; and a current monitoring circuit for monitoring an output signal of said amplifier circuit, said current monitoring circuit having an input terminal for receiving the output signal, a control terminal connected to the first and second switching circuits of said amplifier circuit, and means for providing a signal on said control terminal for closing said first switching means and for opening said second switching means when the output signal of said amplifier circuit exceeds a predetermined limit.

Claim 26

The power amplifier circuit recited in claim 20, further comprising: means for opening the first switching circuit and closing the second switching circuit to send out the output signal, and for closing the first switching circuit and opening the second switching circuit to stop the output signal.

Claim 27

The power amplifier circuit recited in claim 20, wherein said input and output transistors are fabricated using CMOS technology.

Claim 28

The power amplifier circuit recited in claim 20, wherein said power amplifier circuit is formed on a single IC chip.