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US5541440A Expired / Lapsed US ⏱️ 0.0 years remaining

Isolation structure for semiconductor device

Assignee: Mitsubishi Electric Corp
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Filing: 1994-07-21
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Granted: 1996-07-30
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Expires: 2014-07-21
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Abstract

Abstract It is an object of the present invention to provide a semiconductor device which has a high electrical isolation capability and an enhanced electrical reliability for avoiding short circuit of individual conductive layers, and the present invention also provides a method of manufacturing such a semiconductor device. An n + buried layer and an n - epitaxial growth layer are formed on a p - silicon substrate. An element isolation oxide film having a through hole is formed on the surface of n - epitaxial growth layer. A trench which penetrates through n - epitaxial growth layer and n + buried layer to reach a predetermined depth of p - silicon substrate is formed under through hole. A first insulating layer covers the internal wall of trench. A covering layer covers the sidewall of through hole. A filling layer is formed to fill trench so that the top surface thereof is located within through hole. A second insulating layer is formed on filling layer.

Inventors

  • 👤 Yutaka Kozai
  • 👤 Kiyoto Watabe
  • 👤 Tatsuhiko Ikeda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 10:51
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10W; H10W10/00; H10W10/01; H10W10/041; H10W10/40

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 141 words
A semiconductor device having an element isolation structure in which a trench isolation and an oxide film isolation are combined, comprising: a silicon substrate having a main surface and a trench formed at the main surface; an element isolation oxide film formed above said trench and having a through hole communicating with said trench; a first insulating layer covering an internal wall of said trench; a covering layer comprising a material different from the element isolation oxide film formed to cover a sidewall of said through hole so as to contact said first insulating layer; a filling layer filling said trench and having a top surface thereof located within said through hole; and a second insulating layer formed on said filling layer to fill said through hole, wherein said covering layer comprises a material different from that of the filling layer.
Claim 2
Dependent Claim 141 words
A semiconductor device having an element isolation structure in which a trench isolation and an oxide film isolation are combined, comprising: a silicon substrate having a main surface and a trench formed at the main surface; an element isolation oxide film formed above said trench and having a through hole communicating with said trench; a first insulating layer covering an internal wall of said trench; a covering layer comprising a material different from the element isolation oxide film formed to cover a sidewall of said through hole so as to contact said first insulating layer; a filling layer filling said trench and having a top surface thereof located within said through hole; and a second insulating layer formed on said filling layer to fill said through hole, wherein said covering layer comprises a material different from that of the filling layer.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-30 2000-01-29 2000-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-30 2004-01-29 2004-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-30 2008-01-29 2008-07-30 $7700.00 Window Closed / Lapsed

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