Integrated circuit for remote beam control in a phased array antenna system

Claim 2

An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an ID memory for storing a unique antenna element ID addressable by the central processing unit; a command decoder coupled to said ID memory and receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said command decoder comparing an ID address associated with the global commands with said ID stored in said ID memory and recognizing the global commands as local commands to be executed locally by the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said ID memory; and processing means coupled to said command decoder for generating and supplying control signals to the respective antenna element in response to the local commands.

Claim 3

The integrated circuit of claim 1, further comprising: beam pulse shape memory means for storing a plurality of sets of beam pulse shaping data for the respective antenna element, each set representing one of a plurality of beam pulse shapes; and beam pulse shape selecting means for selecting a set of beam pulse shaping data representing a beam pulse shape corresponding to an operating mode identified in the local commands from the central processing unit, wherein the control signals generated by said processing means include the selected set of beam pulse shaping data.

Claim 4

The integrated circuit of claim 2, wherein said beam pulse shape memory means comprises a pair of memories including first and second random access memories (RAMs) each storing one set of beam pulse shaping data, and wherein said beam pulse shape selecting means causes the set of beam pulse shaping data to be read out of a selected one of said first and second RAMs in response to a local command.

Claim 5

The integrated circuit of claim 2, wherein the beam pulse shaping data includes phase and attenuation data.

Claim 6

The integrated circuit of claim 2, wherein the beam pulse shaping data includes polarization data.

Claim 7

The integrated circuit of claim 2, further comprising: beam data receiving means for receiving global beam pulse shaping data globally transmitted with the global commands from the central processing unit over the distributed serial bus, for recognizing the global beam pulse shaping data as local beam pulse shaping data when the ID address associated with the global beam pulse shaping data is the same as the ID stored in said ID memory, and for storing the local beam pulse shaping data in said beam pulse shape memory.

Claim 8

The integrated circuit of claim 6, wherein said beam pulse shape memory includes first and second random access memories (RAMs) each storing one set of beam pulse shaping data, and wherein said beam data receiving means causes a set of local beam pulse shaping data received from the central processing unit to be stored in a selected one of said first and second RAMs in response to a local command.

Claim 9

The integrated circuit of claim 7, wherein said beam pulse shape selecting means causes a set of beam pulse shaping data to be read out of a selected one of said first and second RAMs in response to a local command, the selected one of said first and second RAMs selected by said beam pulse shape selecting means being different from that selected by said beam data receiving means such that a set of beam pulse shaping data may be written into one of said first and second RAMs while a different set of beam pulse shaping data is read out of the other of said first and second RAMs.

Claim 10

The integrated circuit of claim 1, further comprising: adjustable delay means for introducing a local delay into transmit and/or receive enable signals globally transmitted to all the antenna elements.

Claim 11

The integrated circuit of claim 9, wherein the amount of delay introduced corresponds to operating characteristics of the associated antenna element.

Claim 12

The integrated circuit of claim 1, further comprising: a temperature sensor for sensing the temperature of the integrated circuit and providing a signal indicative of the sensed temperature; and inhibiting means for inhibiting transmission and/or reception by the associated antenna element when the temperature of the integrated circuit exceeds a predetermined threshold level.

Claim 13

The integrated circuit of claim 1, wherein said ID memory comprises a nonvolatile memory.

Claim 14

The integrated circuit of claim 12, wherein said ID memory comprises an EEPROM.

Claim 15

The integrated circuit of claim 1, further comprising: means for receiving a synchronizing clock signal from the central processing unit, and for controlling the timing of operations of the integrated circuit in response thereto.

Claim 16

(Amended) An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an EEPROM for storing a unique ID for the respective antenna element and addressable by the central processing unit; a command decoder receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said decoder comparing an ID address associated with the global commands with said ID stored in said EEPROM, and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said EEPROM; a beam pulse shape memory for storing a plurality of sets of beam pulse shaping data for the respective element, each set representing one of a plurality of beam pulse shapes; beam pulse shape selecting means for selecting a set of beam pulse shaping data representing a beam pulse shape corresponding to an operating mode identified in the local commands from the central processing unit; and processing means for generating and providing control signals, which include the selected set of beam pulse shaping data, to the respective antenna element in response to the local commands.

Claim 17

(Amended) An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an EEPROM for storing a unique ID for the respective antenna element and addressable by the central processing unit; a command decoder receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said decoder comparing an ID address associated with the global commands with said ID stored in said EEPROM, and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said EEPROM; a beam pulse shape memory for storing a plurality of sets of beam pulse shaping data for the respective element, each set representing one of a plurality of beam pulse shapes; beam pulse shape selecting means for selecting a set of beam pulse shaping data representing a beam pulse shape corresponding to an operating mode identified in the local commands from the central processing unit; and processing means for generating and providing control signals, which include the selected set of beam pulse shaping data, to the respective antenna element in response to the local commands.

Claim 18

The integrated circuit of claim 15, further comprising: a temperature sensor for sensing the temperature of the integrated circuit and providing a signal indicative of the sensed temperature; and inhibiting means for inhibiting transmission and/or reception by said respective antenna element when the temperature of the integrated circuit exceeds a predetermined threshold level.

Claim 19

The integrated circuit of claim 15, further comprising: adjustable delay means for introducing a respective local delay into transmit and/or receiving enable signals globally transmitted to all the antenna elements.

Claim 20

An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an ID memory for storing a unique antenna element ID addressable by the central processing unit; a command decoder coupled to said ID memory and receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said command decoder comparing an ID address associated with the global commands with said ID stored in said ID memory and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said ID memory; a first and a second beam pulse shape memory for storing a respective plurality of sets of beam pulse shaping data, each said set representing one of a plurality of beam pulse shapes; beam pulse shape selecting means causing a set of beam pulse shaping data to be read out of a selected one of said first and second memories in response to a local command, the selected one of said first and second memories selected by said beam pulse shape selecting means being different from that selected by said beam data receiving means such that a set of beam pulse shaping data may be written into one of said first and second memories while a different set of beam pulse shaping data is read out of the other of said first and second memories; and processing means coupled to said command decoder for generating and applying control signals to the respective antenna element of the phased array antenna system in response to the local commands.

Claim 21

An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an ID memory for storing a unique antenna element ID addressable by the central processing unit; a command decoder coupled to said ID memory and receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said command decoder comparing an ID address associated with the global commands with said ID stored in said ID memory and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said ID memory; a first and a second beam pulse shape memory for storing a respective plurality of sets of beam pulse shaping data, each said set representing one of a plurality of beam pulse shapes; beam pulse shape selecting means causing a set of beam pulse shaping data to be read out of a selected one of said first and second memories in response to a local command, the selected one of said first and second memories selected by said beam pulse shape selecting means being different from that selected by said beam data receiving means such that a set of beam pulse shaping data may be written into one of said first and second memories while a different set of beam pulse shaping data is read out of the other of said first and second memories; and processing means coupled to said command decoder for generating and applying control signals to the respective antenna element of the phased array antenna system in response to the local commands.

Claim 22

An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an ID memory for storing a unique antenna element ID addressable by the central processing unit; a command decoder coupled to said ID memory and receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said command decoder comparing an ID address associated with the global commands with said ID stored in said ID memory and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said ID memory; processing means coupled to said command decoder for generating and applying control signals to the respective antenna element of the phased array antenna system in response to the local commands. a temperature sensor for sensing the temperature of the integrated circuit and generating a signal indicative of the sensed temperature; inhibiting means coupled to said temperature sensor and being responsive to the signal generated thereby for inhibiting transmission and/or reception by the respective antenna element when the temperature of the integrated circuit exceeds a predetermined threshold level.

Claim 23

An integrated circuit for use in controlling a phased array antenna system having a central processing unit, a respective said integrated circuit being associated with each one of a plurality of antenna elements of the phased array antenna system, said integrated circuit comprising: an ID memory for storing a unique antenna element ID addressable by the central processing unit; a command decoder coupled to said ID memory and receiving global commands from the central processing unit globally transmitted over a distributed serial bus, said command decoder comparing an ID address associated with the global commands with said ID stored in said ID memory and recognizing the global commands as local commands to be executed locally for the respective antenna element when the ID address associated with the global commands is the same as the ID stored in said ID memory; processing means coupled to said command decoder for generating and applying control signals to the respective antenna element of the phased array antenna system in response to the local commands. a temperature sensor for sensing the temperature of the integrated circuit and generating a signal indicative of the sensed temperature; inhibiting means coupled to said temperature sensor and being responsive to the signal generated thereby for inhibiting transmission and/or reception by the respective antenna element when the temperature of the integrated circuit exceeds a predetermined threshold level.