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US5527729A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing a capacitor having metal electrodes

Assignee: RPX Corp
•
Filing: 1995-03-29
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Granted: 1996-06-18
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Expires: 2015-03-29
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Abstract

Abstract On a silicon substrate, a silicon oxide layer, a first platinum layer, a dielectric film and a second platinum layer are formed, and then the second platinum layer and the dielectric film are dry etched, via a resist layer, in a 1-5 Pa low pressure region with a mixed gas of HBr and O 2 as the etching gas. As soon as the first platinum layer is exposed, the unetched portion of dielectric film is etched off in a 5-50 Pa high pressure region, and then the first platinum layer is dry etched again in the low pressure region to form a capacitor consisting of a top electrode, a capacitance insulation layer and a bottom electrode in a semiconductor integrated circuit chip. Using this manufacturing method prevents the deterioration in definition caused by the use of a thick resist and the operation failure of circuit elements such as transistors due to over etching on the insulation layer.

Inventors

  • 👤 Shoji Matsumoto
  • 👤 Yoshihisa Nagano
  • 👤 Yasuhiro Shimada
  • 👤 Yasufumi Izutsu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-10 01:35
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 95 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulation layer, a first metal layer, a dielectric film, and a second metal layer on a substrate having circuit elements formed thereon; dry etching said second metal layer and said dielectric film to form a top electrode and a capacitance insulation film, wherein at least this dry etching step is performed using mixed gas containing hydrogen halide and oxygen; and dry etching said first metal layer to form a bottom electrode after dry etching said second metal layer and said dielectric film.
Claim 2
Independent Claim 95 words
A method of manufacturing a semiconductor device comprising the steps of: forming an insulation layer, a first metal layer, a dielectric film, and a second metal layer on a substrate having circuit elements formed thereon; dry etching said second metal layer and said dielectric film to form a top electrode and a capacitance insulation film, wherein at least this dry etching step is performed using mixed gas containing hydrogen halide and oxygen; and dry etching said first metal layer to form a bottom electrode after dry etching said second metal layer and said dielectric film.
Claim 3
Dependent Claim 37 words
A method of manufacturing a semiconductor device according to claim 1, wherein the percentage of oxygen in the etching gas of hydrogen halide and oxygen is about 10% to about 35% of the total etching gas flow.
Claim 4
Dependent Claim 20 words
A method of manufacturing a semiconductor device according to claim 1 or claim 2, wherein the hydrogen halide is HBr.

References Cited (Backward Citations)

US5173437A Cited
US5286667A Cited
JPH06112169A Cited
US5439840A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-06-18 1999-12-18 2000-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-06-18 2003-12-18 2004-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-06-18 2007-12-18 2008-06-18 $7700.00 Window Closed / Lapsed

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