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US5524121A
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Digital data modulating method
Assignee: SMK Corp
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Filing: 1994-11-29
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Granted: 1996-06-04
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Expires: 2014-11-29
Abstract
Abstract Disclosed is an improved digital data modulating method appropriate for stable and high-speed communication. It comprises the step of allotting each of N sequential digital data bit combinations to a corresponding period-and-phase discriminating signal, thereby providing a modulated signal in the form of a series of different single-periods, which modulated signal is insensitive to noise signals appearing in communication mediums.
Inventors
- 👤 Mototoshi Nambu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:29
CPC Classifications
G; G08; G08C; G08C19/00; G08C19/16
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
342 words
A digital data modulating method comprising the steps of: dividing a series of binary bits into groups of at least three binary bits: and allotting each of the sequential group to a corresponding predetermined period-and-phase discriminating signal, therein providing a series of different period-and-phase discriminating signals representing a given digital data wherein the digital data is related with the period-and-phase discriminating signals as follows: if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is L, L and L, it is allotted to a first period-and-phase discriminating signal having a short period T s , appearing synchronous with the leading end S of the intermediate bit b 1+1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is L, L and H, it is allotted to a second period-and-phase discriminating signal having an intermediate period T M , appearing synchronous with the leading end S of the intermediate bit b 1+1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, L and L, it is allotted to a third period-and-phase discriminating signal having an intermediate period T M , appearing synchronous with the intermediate point C of the leading bit b 1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, L and H, it is allotted to a fourth period-and-phase discriminating signal having a long period T L , appearing synchronous with the intermediate point C of the leading bit b 1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, H and -, it is allotted to a fifth period-and-phase discriminating signal having a short period T s , appearing synchronous with the intermediate point C of the leading bit b 1 , where L and H stand for binary digits "0" and "1", and - stands for either binary digit.
Claim 2
Dependent Claim
342 words
A digital data modulating method comprising the steps of: dividing a series of binary bits into groups of at least three binary bits: and allotting each of the sequential group to a corresponding predetermined period-and-phase discriminating signal, therein providing a series of different period-and-phase discriminating signals representing a given digital data wherein the digital data is related with the period-and-phase discriminating signals as follows: if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is L, L and L, it is allotted to a first period-and-phase discriminating signal having a short period T s , appearing synchronous with the leading end S of the intermediate bit b 1+1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is L, L and H, it is allotted to a second period-and-phase discriminating signal having an intermediate period T M , appearing synchronous with the leading end S of the intermediate bit b 1+1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, L and L, it is allotted to a third period-and-phase discriminating signal having an intermediate period T M , appearing synchronous with the intermediate point C of the leading bit b 1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, L and H, it is allotted to a fourth period-and-phase discriminating signal having a long period T L , appearing synchronous with the intermediate point C of the leading bit b 1 ; if the three sequential digital data bit combination (b 1 , b 1+1 and b 1+2 ) is H, H and -, it is allotted to a fifth period-and-phase discriminating signal having a short period T s , appearing synchronous with the intermediate point C of the leading bit b 1 , where L and H stand for binary digits "0" and "1", and - stands for either binary digit.
Claim 3
Dependent Claim
53 words
A digital data modulating method according to claim 1, wherein each of the period-and-phase discriminating signals allotted to the three sequential digital data bit combinations has a period T s , T M or T L equal to the bit ceil width t b , 1.5 t b or 2.0 t b .
References Cited (Backward Citations)
US3454718A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-06-04 | 1999-12-04 | 2000-06-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-06-04 | 2003-12-04 | 2004-06-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-06-04 | 2007-12-04 | 2008-06-04 | $7700.00 | Window Closed / Lapsed |