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US5523253A Expired / Lapsed US ⏱️ 0.0 years remaining

Array protection devices and fabrication method

Assignee: International Business Machines Corp
•
Filing: 1995-02-16
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Granted: 1996-06-04
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Expires: 2015-02-16
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Abstract

Abstract The present disclosure sets forth an improved integrated circuit in which circuit elements, adjacent to a fuse, are protected by barriers positioned adjacent the fuse. In the improved integrated circuit the barriers are non-frangible, high melting point structures buried in the passivating layer, covering a wiring layer containing a fuse, and are between the fuse and adjacent circuit elements in the wiring layer structures. Also taught is a method of protecting circuit elements adjacent a fuse comprising the steps of depositing an insulating layer on the surface of a semiconductor device having active regions therein, forming a plurality of fuses and circuit elements in said layer, coating said fuses and elements with a second insulating layer, patterning said second insulating layer to form grooves between each of said fuses and any adjacent fuse or circuit element, and depositing a high melting point and non-frangible material in said grooves.

Inventors

  • 👤 Richard A. Gilmour
  • 👤 Thomas J. Hartswick
  • 👤 David C. Thomas
  • 👤 Ronald R. Uttecht
  • 👤 Erick G. Walton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 21:15
CPC Classifications
H; H10; H10W; H10W42/00; H10W42/80

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 96 words
A method of protecting elements formed on the surface of an substrate adjacent a fusible link comprising the steps of: selecting a substrate: depositing an insulating layer on the surface of said substrate; depositing a metallic layer on said insulating layer; forming a plurality of elements, including a fuse, in said metallic layer; coating said fuse and said elements with a passivating layer; treating said passivating layer to form grooves between said fuse and any adjacent element; and depositing a metal having a melting point higher than the melting point of the fuse in said grooves.
Claim 2
Independent Claim 96 words
A method of protecting elements formed on the surface of an substrate adjacent a fusible link comprising the steps of: selecting a substrate: depositing an insulating layer on the surface of said substrate; depositing a metallic layer on said insulating layer; forming a plurality of elements, including a fuse, in said metallic layer; coating said fuse and said elements with a passivating layer; treating said passivating layer to form grooves between said fuse and any adjacent element; and depositing a metal having a melting point higher than the melting point of the fuse in said grooves.
Claim 3
Independent Claim 131 words
A method of protecting circuit elements in a wiring layer formed on the surface of an integrated circuit adjacent a fuse comprising the steps of: selecting a semiconductor body: forming a plurality of active regions therein; depositing an insulating layer on the surface of said semiconductor body having the active regions therein; depositing a metallic wiring layer on said insulating layer; forming a plurality of circuit elements, including a fuse, in said wiring layer; forming connectors, through said insulating layer, between said wiring layer and said active regions; coating said fuse and said elements with a passivating layer; treating said passivating layer to form grooves between said fuse and any adjacent element; and depositing a metal having a melting point higher than the melting point of the fuse in said grooves.
Claim 4
Independent Claim 131 words
A method of protecting circuit elements in a wiring layer formed on the surface of an integrated circuit adjacent a fuse comprising the steps of: selecting a semiconductor body: forming a plurality of active regions therein; depositing an insulating layer on the surface of said semiconductor body having the active regions therein; depositing a metallic wiring layer on said insulating layer; forming a plurality of circuit elements, including a fuse, in said wiring layer; forming connectors, through said insulating layer, between said wiring layer and said active regions; coating said fuse and said elements with a passivating layer; treating said passivating layer to form grooves between said fuse and any adjacent element; and depositing a metal having a melting point higher than the melting point of the fuse in said grooves.

References Cited (Backward Citations)

US4536949A Cited
US4602420A Cited
US4853758A Cited
JPH025055A Cited
US5285099A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-06-04 1999-12-04 2000-06-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-06-04 2003-12-04 2004-06-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-06-04 2007-12-04 2008-06-04 $7700.00 Window Closed / Lapsed

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