Arrangement for testing a watchdog circuit

Claim 1

An arrangement for testing operation of a watchdog circuit, the arrangement comprising: said watchdog circuit having an input and an output; a microcomputer having a pulse output connected to the input of said watchdog circuit and a control input connected to said output of said watchdog circuit; said microcomputer having a pulse generator for supplying a pulse sequence to said watchdog circuit during a test cycle for testing the operation of said watchdog circuit; said pulse sequence having a pulse width T i , pulse dead time T p and pulse amplitude wherein said pulse width T i , said pulse dead time T p and said pulse amplitude are respective parameters of said pulse sequence and one of said parameters being variable; said watchdog circuit including comparator means for comparing said one variable parameter of said pulse sequence to a pregiven limit value and for generating and supplying a reset signal to said microcomputer when said one parameter departs from said limit value by exceeding said limit value or by dropping below said limit value; said microcomputer including means for changing said one parameter of said pulse sequence when said pulse sequence is supplied to said watchdog circuit; said means for changing said one parameter being adapted to change said one parameter of said pulse sequence to a value which lies above or below said limit value; and, said microcomputer further including means for determining that the operation of said watchdog circuit is correct when said reset signal is received from said watchdog circuit during said test cycle.