Circuit for a demodulator for a radio data signal in a radio receiver

Claim 2

Circuit for a demodulator for a radio data signal in a radio receiver, where transmission of the radio data signal is carried out through phase shifting of at least one suppressed auxiliary signal (pc1, ps1) within a multiplex signal (MPX), comprising filter means (15) for band-pass filtering the multiplex signal, said filtering defining a base band; means (18, 19) for obtaining, from the radio receiver, at a scanning clock rate produced by the radio receiver, reference carriers having two phase positions shifted 90° with respect to each other; mixing means (16, 17) for mixing, into the base band, the filtered multiplex signal (MPX) in digital form and said reference carriers having said two phase positions shifted 90° with respect to each other, to thereby produce a first mix signal (wc) and a second mix signal (ws); generating means (37) for producing a first and a second auxiliary signal (pc1, ps1) having, respectively, a cosine and a sine wave form; first multiplying means (33, 34) for multiplying the first mix signal (wc) by said first auxiliary signal (pc1) and for multiplying the second mix signal (ws) by said second auxiliary signal (ps1) and deriving first and second multiplied signals; adding means (38) coupled to receive the first and second multiplied signals and adding the first and second multiplied signals, and producing a first output signal (A1); second multiplying means (35, 36) for multiplying the first mix signal (wc) by the second auxiliary signal (ps1) and for multiplying the second mix signal (ws) by the first auxiliary signal (pc1) and deriving third and fourth multiplied signals; subtracting means (39) coupled to receive said third and fourth multiplied signals and forming the difference between the third and fourth multiplied signals, and thereby producing a second output signal (A2); and means for controlling the phase position of the first and second auxiliary signals (pc1, ps1) to cause the first output signal (A1) to correspond to the radio data signal (RDS) shifted down into the base band; wherein said means for controlling said phase position comprises multiplying means (48) for multiplying the first output signal (A1) by the second output signal (A2) to obtain a third output signal (A3); a plurality of low-pass filters (53, 54, 55) connected to have the first (A1) and the second (A2) and the third (A3) output signal each passed through a respective low-pass filter (53, 54, 55) and deriving first (H1), second (H2) and third filtered signals; third multiplying means (56) for multiplying the first (H1) and the second (H2) low-pass filtered signals (H1, H2) by each other and deriving a multiplied signal (H4); subtracting means (58) for subtracting the multiplied signal (H4) from the low-pass filtered third signal (H3); and a threshold circuit (59) receiving the result (H5) of the subtraction and generating a control voltage for said auxiliary signal generating means (37), producing said auxiliary signals (pc1, ps1).

Claim 3

Circuit according to claim 1, wherein the reference carrier is present as a 0, 1, 0, -1 . . . sequence of numbers for a sine phase position and as a 1, 0, -1, 0 . . . sequence of numbers for a cosine phase position.

Claim 4

Circuit according to claim 1, wherein the second output signal (A2) is a traffic broadcast signal in the baseband.

Claim 5

Circuit according to claim 3, wherein the result of the multiplication of the first and the second output signals (H1, H2), having passed through the low-pass filter (53, 55), is multiplied by a constant (n) prior to subtraction.

Claim 6

Circuit for a demodulator for a radio data signal in a radio receiver, where transmission of the radio data signal is carried out through phase shifting of at least one suppressed auxiliary signal (pc1, ps1) within a multiplex signal (MPX), comprising filter means (15) for band-pass filtering the multiplex signal, said filtering defining a base band; means (18, 19) for obtaining, from the radio receiver, at a scanning clock rate produced by the radio receiver, reference carriers having two phase positions shifted 90° with respect to each other; mixing means (16, 17) for mixing, into the base band, the filtered multiplex signal (MPX) in digital form and said reference carrier having said two phase positions shifted 90° with respect to each other, to thereby produce a first mix signal (wc) and a second mix signal (ws); generating means (37) for producing a first and a second periodic auxiliary signal (pc1, ps1); first multiplying means (33, 34) for multiplying the first mix signal (wc) by said first auxiliary signal (pc1) and for multiplying the second mix signal (ws) by said second auxiliary signal (ps1) and deriving first and second multiplied signals; adding means (38) coupled to receive the first and second multiplied signals and adding the first and second multiplied signals, and producing a first output signal (A1); second multiplying means (35, 36) for multiplying the first mix signal (wc) by the second auxiliary signal (ps1) and for multiplying the second mix signal (ws) by the first auxiliary signal (pc1) and deriving third and fourth multiplied signals; subtracting means (39) coupled to receive said third and fourth multiplied signals and forming the difference between the third and fourth multiplied signals, and thereby producing a second output signal (A2); and means (53, 54, 55, 56, 57, 58) for controlling the phase position of the first and second auxiliary signals (pc1, ps1) to cause the first output signal (A1) to correspond to the radio data signal (RDS) shifted down into the base band; said phase position control means comprising means for providing a control signal to said means (37) for generating at least one of said auxiliary signals (pc1, ps1), for controlling said at least one auxiliary signal in dependence on the provided control signal, wherein said control signal can assume two levels; and wherein said generating means (37) comprises a register (62), said register being incremented or decremented by clock signals having a frequency which is significantly higher than the frequency of the respective periodic signal to be generated, said register being, respectively, incremented or decremented in dependence on the level of the control signal; and means (65) for calculating a function value from the respective content of the register (62) and generating said periodic auxiliary signals (pc1, ps1), wherein the value range which the content of the register (62) can assume corresponds to a half-period of the respective auxiliary signal (pc1, ps1) to be generated; and wherein, upon an overflow or underflow of the register (62), the sign of the calculated function value is changed.

Claim 7

Circuit for a demodulator for a radio data signal in a radio receiver, where transmission of the radio data signal is carried out through phase shifting of at least one suppressed auxiliary signal (pc1, ps1) within a multiplex signal (MPX), comprising filter means (15) for band-pass filtering the multiplex signal, said filtering defining a base band; means (18, 19) for obtaining, from the radio receiver, at a scanning clock rate produced by the radio receiver, reference carriers having two phase positions shifted 90° with respect to each other; mixing means (16, 17) for mixing, into the base band, the filtered multiplex signal (MPX) in digital form and said reference carrier having said two phase positions shifted 90° with respect to each other, to thereby produce a first mix signal (wc) and a second mix signal (ws); generating means (37) for producing a first and a second periodic auxiliary signal (pc1, ps1); first multiplying means (33, 34) for multiplying the first mix signal (wc) by said first auxiliary signal (pc1) and for multiplying the second mix signal (ws) by said second auxiliary signal (ps1) and deriving first and second multiplied signals; adding means (38) coupled to receive the first and second multiplied signals and adding the first and second multiplied signals, and producing a first output signal (A1); second multiplying means (35, 36) for multiplying the first mix signal (wc) by the second auxiliary signal (ps1) and for multiplying the second mix signal (ws) by the first auxiliary signal (pc1) and deriving third and fourth multiplied signals; subtracting means (39) coupled to receive said third and fourth multiplied signals and forming the difference between the third and fourth multiplied signals, and thereby producing a second output signal (A2); and means (53, 54, 55, 56, 57, 58) for controlling the phase position of the first and second auxiliary signals (pc1, ps1) to cause the first output signal (A1) to correspond to the radio data signal (RDS) shifted down into the base band; said phase position control means comprising means for providing a control signal to said means (37) for generating at least one of said auxiliary signals (pc1, ps1), for controlling said at least one auxiliary signal in dependence on the provided control signal, wherein said control signal can assume two levels; and wherein said generating means (37) comprises a register (62), said register being incremented or decremented by clock signals having a frequency which is significantly higher than the frequency of the respective periodic signal to be generated, said register being, respectively, incremented or decremented in dependence on the level of the control signal; and means (65) for calculating a function value from the respective content of the register (62) and generating said periodic auxiliary signals (pc1, ps1), wherein the value range which the content of the register (62) can assume corresponds to a half-period of the respective auxiliary signal (pc1, ps1) to be generated; and wherein, upon an overflow or underflow of the register (62), the sign of the calculated function value is changed.

Claim 8

The circuit of claim 5, wherein said means (65) for calculating the function value includes means (65) for calculating sinusoidal (ps1) and cosinusoidal (pc1) signals by polynomial calculation.

Claim 9

The circuit of claim 5, wherein the second output signal (A2) produces a traffic broadcast signal in the base band.

Claim 10

The circuit of claim 5, wherein said means for controlling the phase position of the first and second auxiliary signals (pc1, ps1) includes multiplying means (48) for multiplying the first output signal (A1) by the second output signal (A2) to obtain a multiplied third output signal (A3); respective low-pass filters (53, 54, 55) through which the first (A1), the second (A2) and the third output signal (A3) each are conducted; multiplying means for multiplying the first and the second low-pass filtered output signals (H1, H2) by each other and subtracting means (58) subtracting the multiplicand signal from the low-pass filtered third output signal (H3); and a threshold circuit (59) receiving the result (H5) of the subtraction and generating a control voltage for said auxiliary signal generating means (37), producing the periodic auxiliary signals (pc1, ps1).

Claim 11

The circuit of claim 6, wherein the reference carrier is present as a 0, 1, 0, -1 . . . sequence of numbers for a sine phase position and as a 1, 0, -1, 0 . . . sequence of numbers for a cosine phase position.

Claim 14

The method of claim 10, wherein the periodic auxiliary signals are sinusoidal and cosinusoidal.

Claim 15

The method of claim 11, including the steps of calculating the function values of the sinusoidal and cosinusoidal signals by polynomial calculation.

Claim 18

The method of claim 13, wherein the step of generating the periodic auxiliary signals comprises generating sinusoidal and cosinusoidal signals to form, respectively, said first and second auxiliary signals (pc1, ps1).

Claim 19

The method of claim 14, wherein the step of calculating the function values of the sinusoidal and cosinusoidal signals includes polynomial calculation.