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US5519649A
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Micro-processor having rapid condition comparison function
Assignee: Nippon Steel Corp
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Filing: 1994-06-01
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Granted: 1996-05-21
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Expires: 2014-06-01
Abstract
Abstract A micro-processor includes an arithmetic logic unit (ALU) for executing a computer program stored in memory. The micro-processor further includes a condition comparison memory unit, such as a content addressable memory for example, which is connected to the ALU via a data bus. The condition comparison memory unit stores a) comparison patterns for a plurality of comparison operations, and b) output values which correspond to the comparison patterns. Upon receiving an operand of a comparison operation from the ALU, the condition comparison memory unit generates an output value corresponding to the comparison pattern which is coincident with the operand. The generated output value represents a memory address from which the computer program is subsequently executed. The micro-processor also includes an execution control unit which controls the ALU and the condition comparison memory unit.
Inventors
- 👤 Yasuhiko Takahashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 08:38
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30094; G06F9/30003; G06F9/3005; G06F9/30058
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
122 words
A micro-processor comprising: an arithmetic logic unit (ALU) for executing a computer program which is stored in memory; a condition comparison memory unit connected to said ALU via a data bus for storing a plurality of a) comparison patterns for a plurality of comparison operations and b) output values, each comparison pattern corresponding to one output value, said condition comparison memory unit receiving an operand for a comparison operation from said ALU and generating an output value corresponding to said comparison pattern which is coincident with said operand, wherein said output value represents a memory address from which said computer program is subsequently executed; and an execution control unit connected to said ALU and said condition comparison memory unit for controlling thereof.
Claim 2
Dependent Claim
122 words
A micro-processor comprising: an arithmetic logic unit (ALU) for executing a computer program which is stored in memory; a condition comparison memory unit connected to said ALU via a data bus for storing a plurality of a) comparison patterns for a plurality of comparison operations and b) output values, each comparison pattern corresponding to one output value, said condition comparison memory unit receiving an operand for a comparison operation from said ALU and generating an output value corresponding to said comparison pattern which is coincident with said operand, wherein said output value represents a memory address from which said computer program is subsequently executed; and an execution control unit connected to said ALU and said condition comparison memory unit for controlling thereof.
Claim 3
Dependent Claim
14 words
A micro-processor according to claim 1, wherein said execution control unit comprises a sequencer.
Claim 4
Dependent Claim
17 words
A micro-processor according to claim 1, wherein said condition comparison memory unit comprises a content addressable memory.
Claim 5
Dependent Claim
89 words
A micro-processor according to claim 1, wherein said condition comparison memory unit comprises a) a condition number field for storing condition numbers for said plurality of comparison operations and b) a comparison pattern field for storing said comparison patterns for said plurality of comparison operations, said condition comparison memory unit receiving an operand and a condition number for a comparison operation from said ALU and generating an output value corresponding to said comparison pattern coincident with said operand when said received condition number coincides with a stored condition number.
Claim 6
Dependent Claim
39 words
A micro-processor according to claim 1, where said condition comparison memory unit further comprises a flag field to output data indicative of a comparison situation when said output value corresponding to said comparison pattern is coincident with said operand.
Claim 7
Dependent Claim
17 words
A micro-processor according to claim 1, wherein said condition comparison memory unit comprises a programmable logic array.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-21 | 1999-11-20 | 2000-05-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-21 | 2003-11-20 | 2004-05-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-21 | 2007-11-20 | 2008-05-21 | $7700.00 | Window Closed / Lapsed |