US5517520A
Expired / Lapsed
US
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Expandable repeater
Assignee: Winbond Electronics Corp
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Filing: 1994-07-15
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Granted: 1996-05-14
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Expires: 2014-07-15
Abstract
Abstract A repeater includes N repeater circuits coupled to integrator device in a star topology. Each of the N repeater circuits has an Input/Output port for transmitting a clock, data, control and collision signal. A request-for-access signal within the control signals is asserted as repeater circuit is requesting a data repetition. The integrator device has N Input/Output interfaces each of which is coupled to a corresponding Input/Output port, for selectively executing the data repetition and generating the collision signal, in response to the clock and control signals, so that the repeater functions as a single repeater.
Inventors
- 👤 Chiou B. Chi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 18:17
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/20; H04L25/24; H04L12/00; H04L12/28; H04L12/44
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
210 words
A repeater, comprising: N repeater circuits, each of the N repeater circuits having an Input/Output port for transmitting a clock, data, control and collision signal, a request-for-access signal within the control signals being asserted as repeater circuit is requesting a data repetition: an integrator means having N Input/Output interfaces each of which being coupled to the corresponding Input/Output port of said N repeater circuits, for selectively executing the data repetition and generating the collision signal, in response to the clock and control signals, so that said repeater functions as a single repeater, the integrator means comprising a data/collision handler, in response to the request-for-access signal of each Input/Output port, for generating a repetition request signal and the collision signal, wherein the data/collision handler comprises: a resistor circuit having N resistors each of which have a resistance of R, a first end of each resistor being adapted to receive one corresponding request-for-access signal, a second end of each resistor being coupled to a common terminal for generating a first voltage signal; a first means for generating the repetition request signal by comparing the first voltage signal with a first reference signal; and a second means for generating the collision signal by comparing the first voltage signal with a second reference signal.
Claim 2
Dependent Claim
210 words
A repeater, comprising: N repeater circuits, each of the N repeater circuits having an Input/Output port for transmitting a clock, data, control and collision signal, a request-for-access signal within the control signals being asserted as repeater circuit is requesting a data repetition: an integrator means having N Input/Output interfaces each of which being coupled to the corresponding Input/Output port of said N repeater circuits, for selectively executing the data repetition and generating the collision signal, in response to the clock and control signals, so that said repeater functions as a single repeater, the integrator means comprising a data/collision handler, in response to the request-for-access signal of each Input/Output port, for generating a repetition request signal and the collision signal, wherein the data/collision handler comprises: a resistor circuit having N resistors each of which have a resistance of R, a first end of each resistor being adapted to receive one corresponding request-for-access signal, a second end of each resistor being coupled to a common terminal for generating a first voltage signal; a first means for generating the repetition request signal by comparing the first voltage signal with a first reference signal; and a second means for generating the collision signal by comparing the first voltage signal with a second reference signal.
Claim 3
Dependent Claim
94 words
The repeater as claimed in claim 1, wherein the first reference signal is generated at a terminal of a first voltage divider circuit having a first resistor of resistance R/(N-1) and a second resistor of 1.01R, a first terminal of the first resistor being coupled to a reference voltage of Vcc and a second terminal of the second resistor being coupled to the ground voltage, and a second terminal of the first resistor and a first terminal of the second resistor being coupled together to form the terminal of the first voltage divider circuit.
Claim 4
Dependent Claim
94 words
The repeater as claimed in claim 1, wherein the second reference signal is generated at a terminal of a second voltage divider circuit having a first resistor of resistance R/(N-2) and a second resistor of 0.51R, a first terminal of the first resistor being coupled to a reference voltage of Vcc and a second terminal of the second resistor being coupled to the ground voltage, and a second terminal of the first resistor and a first terminal of the second resistor being coupled together to form the terminal of the second voltage divider circuit.
Claim 5
Dependent Claim
19 words
The repeater as claimed in claim 1, wherein each repeater circuit is coupled to a plurality of node equipments.
Claim 6
Dependent Claim
28 words
The repeater as claimed in claim 1, wherein the data are repeated asynchronously between N repeater circuits operated by clock signals with different phase relationship to each other.
Claim 7
Dependent Claim
22 words
The repeater as claimed in claim 1, wherein the Input/Output interface having means for doubling the bit time of the data signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-14 | 1999-11-13 | 2000-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-14 | 2003-11-13 | 2004-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-14 | 2007-11-13 | 2008-05-14 | $7700.00 | Window Closed / Lapsed |