Patent US1520856A successfully refreshed from Google Patents.
Patent US5517241A successfully refreshed from Google Patents.
US5517241A
Expired / Lapsed
US
⏱️ 0.0 years remaining
EEPROM memory card for an electronic still camera
Assignee: Fujifilm Corp
•
Filing: 1993-10-21
•
Granted: 1996-05-14
•
Expires: 2013-10-21
Abstract
Abstract An electronic still camera using a memory card as a picture recording medium, and a memory card applicable thereto and implemented by an EEPROM (Electrically Erasable Programmable Read Only Memory). A picture signal generated by a CCD array and representative of a picture is routed through an amplifier and an analog-to-digital converter to a signal processing circuit. The picture signal is subjected to interpolation and other similar processing by the signal processing circuit, coded by a compressing circuit, and then written to a buffer memory. These steps proceed on a real time basis. The buffer memory is constituted by a storage device having a reading speed and a writing speed which are different from each other. A memory card controller reads data out of the buffer memory and writes them in the memory card at a low speed matching the memory card.
Inventors
- 👤 Kaoru Adachi
- 👤 Satoru Okamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 19:37
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/21; H04N1/2104; H04N1/2112; H04N1/2137; G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/102; H04N1/2158; H04N2101/00; H04N5/00; H04N5/76; H04N5/907; H04N5/91; H04N5/92; H04N5/926; H04N5/9261; H04N5/9264
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
184 words
An EEPROM memory card, comprising: a plurality of EEPROMs for storing data; a plurality of block controller means each being connected to an associated one of said plurality of EEPROMs; a plurality of buffer means each connected to an associated one of said plurality of block controller means for storing data for subsequent transfer to the associated EEPROM of said plurality of EEPROMs; and master controller means connected to said plurality of block controller means for dividing data time-serially inputted thereto into a sequence of blocks of predetermined size by time division and transferring a block of said blocks of data one at a time serially to each said respective block controller means for subsequent transfer to the associated buffer means; said plurality of block controller means thereafter each writing a respective block of said blocks of data fed from said master controller means to the associated buffer means at a relatively high speed and then reading said respective blocks of data out of the associated buffer means in parallel at a relatively low speed to the associated EEPROM of said plurality of EEPROMs.
Claim 2
Dependent Claim
184 words
An EEPROM memory card, comprising: a plurality of EEPROMs for storing data; a plurality of block controller means each being connected to an associated one of said plurality of EEPROMs; a plurality of buffer means each connected to an associated one of said plurality of block controller means for storing data for subsequent transfer to the associated EEPROM of said plurality of EEPROMs; and master controller means connected to said plurality of block controller means for dividing data time-serially inputted thereto into a sequence of blocks of predetermined size by time division and transferring a block of said blocks of data one at a time serially to each said respective block controller means for subsequent transfer to the associated buffer means; said plurality of block controller means thereafter each writing a respective block of said blocks of data fed from said master controller means to the associated buffer means at a relatively high speed and then reading said respective blocks of data out of the associated buffer means in parallel at a relatively low speed to the associated EEPROM of said plurality of EEPROMs.
Claim 3
Dependent Claim
33 words
A memory card as claimed in claim 1, wherein said buffer means comprise single port memories whereby data is allowed to be read out only after data has been written into said memories.
Claim 4
Dependent Claim
34 words
A memory card as claimed in claim 1, wherein said buffer means comprise dual port memories whereby data is allowed to be written in and read out of said memories at the same time.
References Cited (Backward Citations)
US4803554A
Cited
US5067029A
Cited
US5150328A
Cited
US5077612A
Cited
US5060069A
Cited
US5297148A
Cited
US5057924A
Cited
US5032918A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-14 | 1999-11-13 | 2000-05-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-14 | 2003-11-13 | 2004-05-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-14 | 2007-11-13 | 2008-05-14 | $7700.00 | Window Closed / Lapsed |