Patent US5514911A successfully refreshed from Google Patents.
US5514911A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Highly integrated semiconductor device contact structure
Assignee: SK Hynix Inc
•
Filing: 1994-08-09
•
Granted: 1996-05-07
•
Expires: 2014-08-09
Abstract
Abstract The semiconductor connecting device is comprised of a device separation insulating film, a source region and a drain region formed at predetermined portions of a semiconductor substrate; an interlayer insulating film formed on the device separation insulating film and on the drain region, having a contact hole through which a portion of the device separation film is exposed along with a portion of the drain region; a conductive plug formed on the exposed portion of the drain region and on the exposed portion of the drain region within the contact hole, the drain region-sided conductive plug being thinner than the device separation insulating film-sided one; and bit lines formed on the conductive material plug and the interlayer insulating film, coming into contact with them, respectively. The bit line connected with the drain region scarcely overlaps the source region where the charge storage electrode is formed, bringing about a reduction of needed area resulting in a highly integrated semiconductor device.
Inventors
- 👤 Jae K. Kim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 00:47
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/48; H10B12/482; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/069; Y; Y10; Y10S; Y10S148/00; Y10S148/02
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
172 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; an interlayer insulating film formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation film is exposed along with a second portion of said drain region; a conductive plug formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole, the conductive plug having a drain region side which is thinner than a device separation insulating film side and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; and bit lines formed on said conductive plug and said interlayer insulating film, coming into contact with them, respectively, such that at least some of said fourth portion of said interlayer insulating film is left exposed.
Claim 2
Dependent Claim
172 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; an interlayer insulating film formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation film is exposed along with a second portion of said drain region; a conductive plug formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole, the conductive plug having a drain region side which is thinner than a device separation insulating film side and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; and bit lines formed on said conductive plug and said interlayer insulating film, coming into contact with them, respectively, such that at least some of said fourth portion of said interlayer insulating film is left exposed.
Claim 3
Dependent Claim
157 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; an interlayer insulating film formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation film is exposed along with a second portion of said drain region and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; a bit line formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole such that at least some of said fourth portion of said interlayer insulating film is left exposed, the bit line within the contact hole having a drain region side which is thinner than a device separation insulating film side.
Claim 4
Dependent Claim
157 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; an interlayer insulating film formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation film is exposed along with a second portion of said drain region and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; a bit line formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole such that at least some of said fourth portion of said interlayer insulating film is left exposed, the bit line within the contact hole having a drain region side which is thinner than a device separation insulating film side.
Claim 5
Dependent Claim
190 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; a second interlayer insulating film covering an etching barrier material atop a first interlayer material formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation insulating film is exposed along with a second portion of said drain region and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; a pair of spacer insulating films formed at both side walls of said contact hole; and a bit line formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole and such that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film, the bit line within the contact hole being thinner on a drain region side than on a device separation insulating film side.
Claim 6
Dependent Claim
190 words
A highly integrated semiconductor connecting device, comprising: a device separation insulating film, a source region and a drain region formed on portions of a semiconductor substrate; a second interlayer insulating film covering an etching barrier material atop a first interlayer material formed on said device separation insulating film and on said drain region, having a contact hole through which a first portion of said device separation insulating film is exposed along with a second portion of said drain region and so that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film; a pair of spacer insulating films formed at both side walls of said contact hole; and a bit line formed on the exposed first portion of said device separation insulating film and on the exposed second portion of said drain region within the contact hole and such that a third portion of said drain region remains covered over by a fourth portion of said interlayer insulating film, the bit line within the contact hole being thinner on a drain region side than on a device separation insulating film side.
References Cited (Backward Citations)
JPS5333587A
Cited
JPS639148A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-05-07 | 1999-11-06 | 2000-05-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-05-07 | 2003-11-06 | 2004-05-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-05-07 | 2007-11-06 | 2008-05-07 | $7700.00 | Window Closed / Lapsed |