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US5512786A Expired / Lapsed US ⏱️ 0.0 years remaining

Package for housing semiconductor elements

Assignee: Kyocera Corp
•
Filing: 1995-06-01
•
Granted: 1996-04-30
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Expires: 2015-06-01
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Abstract

Abstract A package for housing semiconductor elements including an insulating base which consists of electrical insulation material, and has a mounting portion that mounts semiconductor elements on the upper surface as well as a plurality of depressions on either of the upper surface and the lower surface thereof, a plurality of metallized wiring layers led away from the periphery of the mounting portion and extending to one end surface of the depressions, a plurality of connection pads for electrically connecting the metallized wiring layers formed on the end surface of the depressions of the insulating base and terminals which are soldered to the connection pads, wherein the terminals are accurately attached by solder to designated positions on the connection pads and securely and strongly joined to designated wire conductors of external electronic circuit boards to achieve reliable electrical connections of semiconductor integrated circuit elements housed inside the package to external electronic circuit boards.

Inventors

  • 👤 Hitomi Imamura
  • 👤 Shin Matsuda
  • 👤 Nobuyuki Ito
  • 👤 Kazuhiro Kawabata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 17:35
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H10; H10W; H10W90/00; H10W90/701; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2201/10; H05K2201/10613; H05K2201/10954; H05K2201/10992; H05K2203/00; H05K2203/04; H05K2203/041; H10W72/00; H10W72/50; H10W72/551; H10W72/552; Y; Y02; Y02P; Y02P70/00; Y02P70/50

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 183 words
A package for housing semiconductor elements, the package comprising: an insulating base, comprising electrical insulation material, the insulating base having on the upper surface thereof, a mounting portion that mounts the semiconductor elements as well as a plurality of depressions on either of the upper surface and the lower surface thereof; a plurality of metallized wiring layers led away from the periphery of the mounting portion and extending to one end surface of the depressions; a plurality of connection pads for electrically connecting the metallized wiring layers, formed on the end surface of the depressions of the insulating base; and terminals which are soldered to the connection pads, each terminal forming integrally with the soldered portion, a ball protrusion on the surface of the insulating base, wherein the following equations must be satisfied with respect to D 1a , D 2 and d where D 1a represents the diameter of the ball protrusion, D 2 represents the diameter of the opening of the depression, and d represents the depth of the depression: D 2 <D 1a 0.2 (mm)≦D 2 ≦1.0 (mm) d≧0.05 (mm)
Claim 2
Dependent Claim 183 words
A package for housing semiconductor elements, the package comprising: an insulating base, comprising electrical insulation material, the insulating base having on the upper surface thereof, a mounting portion that mounts the semiconductor elements as well as a plurality of depressions on either of the upper surface and the lower surface thereof; a plurality of metallized wiring layers led away from the periphery of the mounting portion and extending to one end surface of the depressions; a plurality of connection pads for electrically connecting the metallized wiring layers, formed on the end surface of the depressions of the insulating base; and terminals which are soldered to the connection pads, each terminal forming integrally with the soldered portion, a ball protrusion on the surface of the insulating base, wherein the following equations must be satisfied with respect to D 1a , D 2 and d where D 1a represents the diameter of the ball protrusion, D 2 represents the diameter of the opening of the depression, and d represents the depth of the depression: D 2 <D 1a 0.2 (mm)≦D 2 ≦1.0 (mm) d≧0.05 (mm)
Claim 3
Dependent Claim 3 words
08≦d/D 2 ≦0.85.
Claim 4
Dependent Claim 3 words
08≦d/D 2 ≦0.85.
Claim 5
Dependent Claim 28 words
The package for housing semiconductor elements according to claim 1, wherein the terminal comprise a low melting point lead-tin solder with a lead-to-tin weight ratio of about 6:4.
Claim 6
Dependent Claim 172 words
A package for housing semiconductor elements, the package comprising: an insulating base, comprising electrical insulation material, the insulating base having on the upper surface thereof, a mounting portion that mounts the semiconductor elements as well as a plurality of depressions on either of the upper surface and the lower surface thereof; a plurality of metallized wiring layers led away from the periphery of the mounting portion and extending to one end surface of the depressions; a plurality of connection pads for electrically connecting the metallized wiring layers, formed on the end surface of the depressions of the insulating base; and ball terminals which are soldered to the connection pads, wherein the following equations must be satisfied with respect to D 1b , D 2 and d where D 1b represents the diameter of the ball terminal, D 2 represents the depth of the depression, and d represents the depth of the depression: D 2 <D 1b 0.2 (mm)≦D 2 ≦1.0 (mm) D 1b -(D 1b 2 -D 2 2 ) 1/2 ≦2d.
Claim 7
Dependent Claim 172 words
A package for housing semiconductor elements, the package comprising: an insulating base, comprising electrical insulation material, the insulating base having on the upper surface thereof, a mounting portion that mounts the semiconductor elements as well as a plurality of depressions on either of the upper surface and the lower surface thereof; a plurality of metallized wiring layers led away from the periphery of the mounting portion and extending to one end surface of the depressions; a plurality of connection pads for electrically connecting the metallized wiring layers, formed on the end surface of the depressions of the insulating base; and ball terminals which are soldered to the connection pads, wherein the following equations must be satisfied with respect to D 1b , D 2 and d where D 1b represents the diameter of the ball terminal, D 2 represents the depth of the depression, and d represents the depth of the depression: D 2 <D 1b 0.2 (mm)≦D 2 ≦1.0 (mm) D 1b -(D 1b 2 -D 2 2 ) 1/2 ≦2d.
Claim 8
Dependent Claim 29 words
The package for housing semiconductor elements according to claim 3, wherein the ball terminal comprises a high melting point lead-tin solder with a lead-to-tin weight ratio of about 9:1.
Claim 9
Dependent Claim 35 words
The package for housing semiconductor elements according to claim 4, wherein the ball terminal is soldered to the connection pads using a low melting point lead-tin solder with a lead-to-tin weight ratio of about 6:4.

References Cited (Backward Citations)

US5196726A Cited
US5403776A Cited
US5422516A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-04-30 1999-10-30 2000-04-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-04-30 2003-10-30 2004-04-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-04-30 2007-10-30 2008-04-30 $7700.00 Window Closed / Lapsed

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