Masking of circuit board vias to reduce heat-induced board and chip carrier package warp during wavesolder process

Abstract

Abstract A technique for minimizing heat-induced chipside solder joint fractures involving BGA (Ball Grid Array) components mounted on a multilayer printed circuit board when the board is passed through a wavesolder oven. The technique involves shielding the chipside solder joints from the effects of conductive heating by covering the through vias positioned underneath the BGA components with an insulating material. The insulating materials include silk screen material, solder mask and KAPTON tape. During wavesolder, the insulating material blocks conductive heat flow from the exposed board face through the vias and into the BGA component landing areas. With the wavesolder heat flow blocked, the BGA landing areas and BGA components experience much less heat deformation, and a much lower solder joint defect rate is achieved. Selection of silk screen, solder mask or KAPTON tape is based on a balance of solder process conditions and effective insulation capability, with the lowest cost, most effective solution preferred.

Inventors

• 👤 Ronald D. Denton
• 👤 George H. Bumgardner
• 👤 Timothy M. McGuiggan
• 👤 Andrew J. Mawer

Bibliographic Details