US5508659A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Single loop frequency synthesizer with direct digital synthesis
Assignee: Thales SA
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Filing: 1994-12-28
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Granted: 1996-04-16
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Expires: 2014-12-28
Abstract
Abstract A frequency synthesizer with very short acquisition times. With a single loop there is associated a direct digital synthesizer whose signal is injected into the loop by means of a mixer. The adjustment of the loop is done on Np.Fr and the adjustment of the digital synthesis is done on (Ns+)Fr with Np, Ns, K and M as integers, Np being greater than Ns, 0≦K<M, M as a fixed value and where Fr is a reference frequency. The mixture makes it possible to obtain, as a synthesis frequency, (Ns+Np+)Fr. The acquisition time of the digital synthesis is negligible and that of the loop is greatly reduced since it synthesizes steps that are multiples of Fr and not of as with a standard single loop.
Inventors
- 👤 Elie Brunet
- 👤 Jean-Noel Brasselet
- 👤 Eric Souchard
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:38
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/185; H03L7/187
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
131 words
A single-loop frequency synthesizer to give a synthesized frequency that can be written as (N+)Fr where Fr is a frequency, N, K and M are integers with N and M being positive numbers and K being smaller than M in absolute value, this synthesizer comprising a single loop, a reference oscillator to give a signal at the frequency Fr, a mixer having a first input and a second input and an output, the mixer having its first input and its output arranged serially in the loop, and a direct digital synthesizer device having an output connected to the second input of the mixer, the direct digital synthesizer device producing, from the signal at the frequency Fr, a signal at the frequency (Ns+)Fr where Ns is a positive integer smaller than N.
Claim 2
Dependent Claim
131 words
A single-loop frequency synthesizer to give a synthesized frequency that can be written as (N+)Fr where Fr is a frequency, N, K and M are integers with N and M being positive numbers and K being smaller than M in absolute value, this synthesizer comprising a single loop, a reference oscillator to give a signal at the frequency Fr, a mixer having a first input and a second input and an output, the mixer having its first input and its output arranged serially in the loop, and a direct digital synthesizer device having an output connected to the second input of the mixer, the direct digital synthesizer device producing, from the signal at the frequency Fr, a signal at the frequency (Ns+)Fr where Ns is a positive integer smaller than N.
Claim 3
Dependent Claim
99 words
A synthesizer according to claim 1, comprising a variable oscillator having a control input, a mixer having a first input and a second input and in series in its loop a phase comparator having a first input to receive the signal with the frequency Fr and a second input, a low-pass filter having an output, the control input of the variable oscillator, the first input of the mixer, the mixer, an adjustable bandpass filter, an adjustable frequency divider and the second input of the comparator, said direct digital synthesizer device being connected to the second input of the mixer.
Claim 4
Dependent Claim
23 words
A synthesizer according to claim 2, wherein the adjustable filter is adjusted that is a function solely of the value Np, where Np=N-NS.
Claim 5
Dependent Claim
76 words
A synthesizer according to claim 2, wherein the adjustable filter is adjusted as a function of the value Np, where Np=N-Ns and of the value of the output signal of the low-pass filter and comprises, for this purpose, an adder having an output to control the adjustment of the adjustable filter, a first input to receive a signal that is a function of Np and a second input coupled to the output of the low-pass filter.
Claim 6
Dependent Claim
86 words
A synthesizer according to claim 2, comprising a first switching device to cut the loop between the adjustable bandpass filter and the divider and close the loop that is thus cut by a direct link between the oscillator and the divider, a second switching device to make the division ratio of the divider go from the value Np=N-Ns to a value as a function of N, and a level detector mounted downline with respect to the bandpass filter to control the first and second switching devices.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-16 | 1999-10-16 | 2000-04-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-16 | 2003-10-16 | 2004-04-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-16 | 2007-10-16 | 2008-04-16 | $7700.00 | Window Closed / Lapsed |