Semiconductor device having a plurality of chips having identical circuit arrangement sealed in package

Claim 2

A semiconductor device, comprising: a first chip having a circuit arrangement, and a plurality of first terminals formed on a center position of a main surface of the first chip along one of a short side and a long side of the first chip and substantially arranged into a line; a second chip having a circuit arrangement identical to that of the first chip, and a plurality of second terminals formed on a center portion of a main surface of the second chip along one of a short side and a long side of the second chip and substantially arranged into a line, the first and second chips being arranged in a stacked formation so that the main surfaces of the first and second chips face each other or are arranged back to back; a plurality of connecting members connected to the first terminals and the second terminals and provided for external connections; a resin package sealing the first and second chips and the plurality of connecting members; and external connection members having first surfaces and second surfaces opposite to the first surfaces, the connecting members connected to the first terminals being connected to the first surfaces of the external connection members, and the connecting members connected to the second terminals being connected to the second surfaces of the external connection members, wherein an arrangement of the connecting members of the first one of the chips over the circuit arrangement thereof is different from that of the connecting members of the second one of the chips over the circuit arrangement thereof.

Claim 3

The semiconductor device as claimed in claim 1, wherein: each of the first and second chips has a rectangular shape; the first terminals are arranged in a line in a longitudinal direction of the first chip; and the second terminals are arranged in a line in a longitudinal direction of the second chip.

Claim 4

The semiconductor device as claimed in claim 1, wherein: each of the first and second chips has a rectangular shape; the first terminals are arranged in a line in a direction perpendicular to a longitudinal direction of the first chip; and the second terminals are arranged in a line in a direction perpendicular to a longitudinal direction of the second chip.

Claim 5

The semiconductor device as claimed in claim 1, wherein: the first chip has a back surface opposite to the main surface thereof; the second chip has a back surface opposite to the main surface thereof; and the back surface of the first chip is in contact with the back surface of the second chip.

Claim 6

The semiconductor device as claimed in claim 1, wherein the first chip and second chip are arranged in the predetermined direction so that the main surface of the first chip is opposite to the main surface of the second chip.

Claim 7

The semiconductor device as claimed in claim 1, wherein said connecting members comprise: a plurality of lead members for external connections; and tape-automated bonding leads connecting the first and second terminals to the lead members.

Claim 8

The semiconductor device as claimed in claim 1, further comprising: a first insulating member provided between the main surface of the first chip and the connecting members connected to the first terminals formed on the main surface of the first chip; and a second insulating member provided between the main surface of the second chip and the connecting members connected to the second terminals formed on the main surface of the second chip.

Claim 9

The semiconductor device as claimed in claim 7, wherein: the first insulating member is in contact with the main surface of the first chip; and the second insulating member is in contact with the main surface of the second chip.

Claim 10

The semiconductor device as claimed in claim 7, wherein: the first insulating member is in contact with the connecting members connected to the first terminals formed on the main surface of the first chip; and the second insulating member is in contact with the connecting members connected to the second terminals formed on the main surface of the second chip.

Claim 11

The semiconductor device as claimed in claim 7, wherein: the first insulating member is in contact with both the main surface of the first chip and the connecting members connected to the first terminals formed on the main surface of the first chip; and the second insulating member is in contact with both the main surface of the second chip and the connecting members connected to the second terminals formed on the main surface of the second chip.

Claim 12

The semiconductor device as claimed in claim 5, wherein the first chip and the second chip are spaced apart from each other in the predetermined direction.

Claim 13

The semiconductor device as claimed in claim 1, wherein: said connecting members comprise a plurality of lead members for external connections; and the lead members are directly connected to the first and second terminals.

Claim 14

The semiconductor device as claimed in claim 12, wherein: the first chip and second chip are arranged in the predetermined direction so that the main surface of the first chip is opposite to the main surface of the second chip; and the lead members extend in a straight manner between the first and second chips and in parallel with the main surfaces of the first and second chips.

Claim 15

The semiconductor device as claimed in claim 1, wherein the connecting members comprise: a plurality of lead members for external connections; and tape-automated bonding leads connecting the first and second terminals to the lead members, and wherein; the first chip has a back surface opposite to the main surface thereof; the second chip has a back surface opposite to the main surface thereof; and the back surface of the first chip is in contact with the back surface of the second chip.

Claim 16

The semiconductor device as claimed in claim 14, wherein the tape-automated bonding leads comprise curved portions.

Claim 17

The semiconductor device as claimed in claim 14, further comprising: a first insulating film provided between the main surface of the first chip and the tape-automated bonding leads connected to the first terminals formed on the main surface of the first chip; and a second insulating film provided between the main surface of the second chip and the tape-automated bonding leads connected to the second terminals formed on the main surface of the second chip.

Claim 18

The semiconductor device as claimed in claim 1, wherein the connecting members comprise: a plurality of lead members for external connections; and tape-automated bonding leads connecting the first and second terminals to the lead members, and wherein; the first chip and second chip are arranged in the predetermined direction so that the main surface of the first chip is opposite to the main surface of the second chip.

Claim 19

The semiconductor device as claimed in claim 17, wherein the tape-automated bonding leads extend in a straight manner and in parallel with the main surfaces of the first and second chips.

Claim 20

The semiconductor device as claimed in claim 17, wherein the tape-automated bonding leads are spaced apart from each other.

Claim 21

The semiconductor device as claimed in claim 1, wherein the first chip and the second chip are vertically stacked so that the first chip and the second chip are spaced apart from each other in the predetermined direction.

Claim 22

The semiconductor device as claimed in claim 2, wherein: the first terminals are located at a center portion on the main surface of the first chip extending in the longitudinal direction of the first chip; and the second terminals are located at a center portion on the main surface of the second chip extending in the longitudinal direction of the second chip.

Claim 23

The semiconductor device as claimed in claim 3, wherein: the first terminals are located at a center portion on the main surface of the first chip extending in the direction perpendicular to the longitudinal direction of the first chip; and the second terminals are located at a center portion on the main surface of the second chip extending in the direction perpendicular to the longitudinal direction of the second chip.

Claim 24

The semiconductor device as claimed in claim 1, further comprising a package in which the first and second chips are sealed.

Claim 25

A semiconductor device, comprising: a plurality of chips respectively having main surfaces and identical circuit arrangements, the chips being arranged in a stacked formation so that the main surfaces of the chips face each other or are arranged back to back, each of the chips having a plurality of terminals formed on a center portion of the main surface along one of a short side and a long side of each of the chips and substantially arranged in a line; a plurality of connecting members connected to the terminals of the chips and provided for external connections, a first one of the chips having a back surface opposite to the main surface thereof, a second one of the chips having a back surface opposite to the main surface thereof, and the back surface of said first one of the chips being in contact with the back surface of said second one of the chips; a resin package sealing the first one and the second one of the chips and the plurality of connecting members; and external connection members having first surfaces and second surfaces opposite to the first surfaces, the connecting members connected to the terminals being connected to the first surfaces of the external connection members, and the connecting members connected to the terminals being connected to the second surfaces of the external connection members, wherein an arrangement of the connecting members of the first one of the chips over the circuit arrangement thereof is different from that of the connecting members of the second one of the chips over the circuit arrangement thereof.

Claim 26

A semiconductor device, comprising: a plurality of chips respectively having main surfaces and identical circuit arrangements, the chips being arranged in a stacked formation so that the main surfaces of the chips face each other or are arranged back to back, each of the chips having a plurality of terminals formed on a center portion of the main surface along one of a short side and a long side of each of the chips and substantially arranged in a line; a plurality of connecting members connected to the terminals of the chips and provided for external connections, a first one of the chips having a back surface opposite to the main surface thereof, a second one of the chips having a back surface opposite to the main surface thereof, and the back surface of said first one of the chips being in contact with the back surface of said second one of the chips; a resin package sealing the first one and the second one of the chips and the plurality of connecting members; and external connection members having first surfaces and second surfaces opposite to the first surfaces, the connecting members connected to the terminals being connected to the first surfaces of the external connection members, and the connecting members connected to the terminals being connected to the second surfaces of the external connection members, wherein an arrangement of the connecting members of the first one of the chips over the circuit arrangement thereof is different from that of the connecting members of the second one of the chips over the circuit arrangement thereof.

Claim 27

The semiconductor device as claimed in claim 24, wherein: a third one of the chips has a back surface opposite to the main surface thereof; a fourth one of the chips has a back surface to the main surface thereof; the back surface of said third one of the chips is in contact with the back surface of said fourth one of the chips; the first, second, third and fourth ones of the chips are arranged in this order in the predetermined direction; and the main surface of the second one of the chips is opposite to the main surface of the third one of the chips.

Claim 28

The semiconductor device as claimed in claim 24, wherein: the connecting members comprise lead members for external connections, and tape-automated bonding leads provided for the first and fourth ones of the chips; the lead members have ends connected to the terminals formed on the main surfaces of the second and third ones of the chips; and tape-automated bonding leads have first ends connected to the terminals formed on the main surfaces of the first and fourth ones of the chips, and second ends connected to the lead members.

Claim 29

The semiconductor device as claimed in claim 26, further comprising: a first insulating film provided between the main surface of said first one of the chips and the tape-automated bonding leads connected to the terminals formed on the main surface of said first one of the chips; a second insulating film provided between the main surface of said second one of the chips and the lead members connected to the terminals formed on the main surface of said second one of the chips; a third insulating film provided between the main surface of said third one of the chips and the lead members connected to the terminals formed on the main surface of said third one of the chips; and a fourth insulating film provided between the main surface of said fourth tone of the chips and the tape-automated bonding leads connected to the terminals formed on the main surface of said fourth one of the chips.

Claim 30

The semiconductor device as claimed in claim 27, wherein: the first insulating film is in contact with the main surface of said first one of the chips; the second insulating film is in contact with the main surface of said second one of the chips; the third insulating film is in contact with the main surface of said third one of the chips; and the fourth insulating film is in contact with the main surface of said fourth one of the chips.

Claim 31

The semiconductor device as claimed in claim 24, wherein: a third one of the chips has a back surface opposite to the main surface thereof; a fourth one of the chips has a back surface to the main surface thereof; the first, second, third and fourth ones of the chips are arranged in this order in the predetermined direction; the main surface of the second one of the chips is opposite to the main surface of the third one of the chips; the back surface of said first one of the chips is opposite to the main surface of said second one of the chips; and the back surface of said fourth one of the chips is opposite to the main surface of said third one of the chips.

Claim 32

The semiconductor device as claimed in claim 29, wherein: the connecting members comprise first, second, third and fourth tape-automated bonding leads, and lead members; the first tape-automated bonding leads connect the lead frames to the terminals formed on the main surface of said first one of the chips; the second tape-automated bonding leads connect the lead frames to the terminals formed on the main surface of said second one of the chips; the third tape-automated bonding leads connect the lead frames to the terminals formed on the main surface of said third one of the chips; and the fourth tape-automated bonding leads connect the lead frames to the terminals formed on the main surface of said fourth one of the chips.

Claim 33

The semiconductor device as claimed in claim 24, further comprising a package in which the chips are sealed.

Claim 34

A semiconductor device, comprising: a plurality of chips respectively having main surfaces and identical circuit arrangements, the chips being arranged in a stacked formation so that the main surfaces of the chips face each other or are arranged back to back, each of the chips having a plurality of terminals formed on a center portion of the main surface along one of a short side and a long side of each of the chips, and substantially arranged in a line; a plurality of connecting members connected to the terminals of the chips and provided for external connections, the chips being grouped into a plurality of groups, each of the groups including a first one of the chips having a back surface opposite to the main surface thereof, and a second one of the chips having a back surface opposite to the main surface thereof, and the back surface of said first one of the chips being in contact with the back surface of said second one of the chips; a resin package sealing the first one and the second one of the chips and the plurality of connecting members; and external connection members having first surfaces and second surfaces opposite to the first surfaces, the connecting members connected to the terminals being connected to the first surfaces of the external connection members, and the connecting members connected to the terminals being connected to the second surfaces of the external connection members, wherein an arrangement of the connecting members of the first one of the chips over the circuit arrangement thereof is different from that of the connecting members of the second one of the chips over the circuit arrangement thereof.

Claim 35

A semiconductor device, comprising: a plurality of chips respectively having main surfaces and identical circuit arrangements, the chips being arranged in a stacked formation so that the main surfaces of the chips face each other or are arranged back to back, each of the chips having a plurality of terminals formed on a center portion of the main surface along one of a short side and a long side of each of the chips, and substantially arranged in a line; a plurality of connecting members connected to the terminals of the chips and provided for external connections, the chips being grouped into a plurality of groups, each of the groups including a first one of the chips having a back surface opposite to the main surface thereof, and a second one of the chips having a back surface opposite to the main surface thereof, and the back surface of said first one of the chips being in contact with the back surface of said second one of the chips; a resin package sealing the first one and the second one of the chips and the plurality of connecting members; and external connection members having first surfaces and second surfaces opposite to the first surfaces, the connecting members connected to the terminals being connected to the first surfaces of the external connection members, and the connecting members connected to the terminals being connected to the second surfaces of the external connection members, wherein an arrangement of the connecting members of the first one of the chips over the circuit arrangement thereof is different from that of the connecting members of the second one of the chips over the circuit arrangement thereof.

Claim 36

The semiconductor device as claimed in claim 1, wherein: the plurality of connecting members has inner portions provided in the resin package and outer portions extending from the resin package; the outer portions are provided in common to the first and second terminals; and the inner portions connecting the first terminals and the second terminals to the outer portions.

Claim 37

The semiconductor device as claimed in claim 24, wherein: the plurality of connecting members has inner portions provided in the resin package and outer portions extending from the resin package; the outer portions are provided in common to the first and second terminals; and the inner portions connecting the first terminals and the second terminals to the outer portions.

Claim 38

The semiconductor device as claimed in claim 32, wherein: the plurality of connecting members has inner portions provided in the resin package and outer portions extending from the resin package; the outer portions are provided in common to the first and second terminals; and the inner portions connecting the first terminals and the second terminals to the outer portions.