US5504929A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for encoding byte sequence for self-clocked high speed data transfer from a parallel port
Assignee: Adobe Inc
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Filing: 1993-11-17
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Granted: 1996-04-02
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Expires: 2013-11-17
Abstract
Abstract The present invention removes restrictions on the maximum data transfer rate provided by the Centronics® and PC-compatible parallel interface (i.e., standard parallel interface). Further, the present invention retains complete compatibility with the standard parallel port and peripheral device cable. With the present invention, a computer (i.e., host) is able to send data through a standard parallel port at a high rate by eliminating the Busy handshaking signal. Further, one to three Input/Output (I/O) instructions can be eliminated for each byte of data transfer.
Inventors
- 👤 Stuart R. Blair
- 👤 Peter Mierau
- 👤 Randall J. Spurrier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 00:30
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/42; G06F13/4265; G06F13/4269; G06F13/382; G06F13/385; G06F2213/00; G06F2213/0004
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
100 words
A method of achieving high-speed data transfer using a standard parallel interface between a host computer system and a peripheral device comprising the steps of: (a) replacing an old value of one bit of a data byte in a data byte sequence with a new value such that said data byte is not equal to an immediately preceding or immediately succeeding data byte; (b) storing said old value in an encoding byte; repeating steps (a) and (b) for each data byte Ln said data byte sequence; and transmitting said encoding byte and said data byte sequence to said peripheral device.
Claim 2
Independent Claim
100 words
A method of achieving high-speed data transfer using a standard parallel interface between a host computer system and a peripheral device comprising the steps of: (a) replacing an old value of one bit of a data byte in a data byte sequence with a new value such that said data byte is not equal to an immediately preceding or immediately succeeding data byte; (b) storing said old value in an encoding byte; repeating steps (a) and (b) for each data byte Ln said data byte sequence; and transmitting said encoding byte and said data byte sequence to said peripheral device.
Claim 3
Dependent Claim
19 words
The method of claim 1 wherein said data byte sequence and said encoding byte comprise an encoded byte sequence.
Claim 4
Dependent Claim
19 words
The method of claim 2 wherein said encoded byte sequence consists of seven data bytes and one encoding byte.
Claim 5
Dependent Claim
96 words
The method of claim 1 wherein said steps (a) and (b) further include the following steps: (a) storing said data byte in a first byte of a word register; (b) storing an encoding byte in a second byte of said word register; (c) executing a shift operation on said word register such that said old value of said data byte is shifted into said second byte and one bit of said alternating binary digit sequence becomes said new value of said data byte; and (d) storing the contents of said first byte in an output buffer.
Claim 6
Dependent Claim
23 words
The method of claim 4 wherein said steps (a), (c) and (d) are executed for each data byte in said data byte sequence.
Claim 7
Dependent Claim
15 words
The method of claim 4 wherein said second byte is stored in said output buffer.
Claim 8
Dependent Claim
16 words
The method of claim 4 wherein said encoding byte is an alternating sequence of binary digits.
Claim 9
Dependent Claim
72 words
The method of claim 1 further including the following steps: (a) receiving an encoding byte into a shift register; (b) storing data bits of said data byte in a memory store; (c) executing a shift operation on said shift register such that said old value of said data byte is shifted into said memory store to obtain a decoded data byte; and (d) storing said decoded data byte in an input buffer.
Claim 10
Dependent Claim
22 words
The method of claim 8 wherein said steps (b) through (d) are executed for each data byte in said data byte sequence.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-04-02 | 1999-10-02 | 2000-04-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-04-02 | 2003-10-02 | 2004-04-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-04-02 | 2007-10-02 | 2008-04-02 | $7700.00 | Window Closed / Lapsed |