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US5502004A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing a semiconductor device with heat treated diffusion layers

Assignee: Samsung Electronics Co Ltd
•
Filing: 1993-09-07
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Granted: 1996-03-26
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Expires: 2013-09-07
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Abstract

Abstract In a method for forming a metal wiring layer of a semiconductor device an insulating layer is formed on a semiconductor substrate having impurity-doped regions. A contact hole is formed in the insulating layer to expose an impurity-doped semiconductor region. Thereafter, a diffusion barrier layer is formed on the inner surface of the contact holes and on the surface of the semiconductor substrate exposed by the contact holes. The diffusion barrier layer is heat-treated for two minutes to one hour in a vacuum at a temperature of 450 DEG C. to 650 DEG C. Then, a metal wiring layer of a semiconductor device is formed on the diffusion barrier layer.

Inventors

  • 👤 Chang-soo Park

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 21:11
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/052; H10W20/0526; H10P; H10P14/00; H10P14/40; H10P14/42; H10W20/033; H10W20/071; H10W20/074; H10W20/076; H10W20/081; H10W20/082

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 120 words
A method for manufacturing a semiconductor device, comprising the steps of: forming an insulating layer on a semiconductor substrate having an impurity-doped region therein, the insulating layer having a contact hole exposing the impurity-doped region; forming a first diffusion barrier layer on the inner surface of the contact hole and on the surface of the semiconductor substrate which is exposed by the contact hole; after said step of forming the first diffusion barrier layer is completed, heat-treating the first diffusion barrier layer at a pressure no greater than about 4 mTorr; forming a metal layer on the second diffusion barrier layer; and patterning the metal layer and the first and second diffusion barrier layers, thereby providing a metal wiring layer.
Claim 2
Independent Claim 120 words
A method for manufacturing a semiconductor device, comprising the steps of: forming an insulating layer on a semiconductor substrate having an impurity-doped region therein, the insulating layer having a contact hole exposing the impurity-doped region; forming a first diffusion barrier layer on the inner surface of the contact hole and on the surface of the semiconductor substrate which is exposed by the contact hole; after said step of forming the first diffusion barrier layer is completed, heat-treating the first diffusion barrier layer at a pressure no greater than about 4 mTorr; forming a metal layer on the second diffusion barrier layer; and patterning the metal layer and the first and second diffusion barrier layers, thereby providing a metal wiring layer.
Claim 3
Dependent Claim 16 words
A method as in claim 1, wherein the first diffusion barrier layer is comprised of titanium.
Claim 4
Dependent Claim 21 words
A method as in claim 1, further comprising the step of: heat-treating the second diffusion barrier layer in a nitrogen atmosphere.
Claim 5
Dependent Claim 35 words
A method as in claim 3, wherein the step of heat-treating the second diffusion barrier layer is performed for about 30 minutes to one hour at a temperature of about 400° C. to 500° C.
Claim 6
Dependent Claim 28 words
A method as in claim 1, wherein said step of heating the first diffusion barrier layer is performed at a temperature between about 450° C. to 650° C.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-03-26 1999-09-25 2000-03-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-03-26 2003-09-25 2004-03-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-03-26 2007-09-25 2008-03-26 $7700.00 Window Closed / Lapsed

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