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US5501989A
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Method of making semiconductor device/circuit having at least partially crystallized semiconductor layer
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1994-03-21
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Granted: 1996-03-26
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Expires: 2014-03-21
Abstract
Abstract Amorphous silicon in impurity regions (source and drain regions or N-type or p-type regions) of TFT and TFD are crystallized and activated to lower electric resistance, by depositing film having a catalyst element such as nickel (Ni), iron (Fe), cobalt (Co) or platinum (Pt) on or beneath an amorphous silicon film, or introducing such a catalyst element into the amorphous silicon film by ion implantation and subsequently crystallizing the same by applying heat annealing at an appropriate temperature.
Inventors
- 👤 Toru Takayama
- 👤 Yasuhiko Takemura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:08
CPC Classifications
H; H10; H10D; H10D8/00; H10D8/01; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D86/00; H10D86/01; H10D86/40; H10D86/60
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
140 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a catalyst element for promoting crystallization and a doping impurity to the amorphous semiconductor film using said gate electrode and said mask material as a mask, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added and a fourth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 2
Independent Claim
140 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a catalyst element for promoting crystallization and a doping impurity to the amorphous semiconductor film using said gate electrode and said mask material as a mask, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added and a fourth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 3
Dependent Claim
21 words
A method of manufacturing a semiconductor circuit as defined in claim 1, wherein the annealing is applied in a hydrogen atmosphere.
Claim 4
Dependent Claim
29 words
A method of manufacturing a semiconductor circuit as defined in claim 1, wherein the mask material for the thin film diode is left after formation of the semiconductor circuit.
Claim 5
Independent Claim
152 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a doping impurity to the amorphous semiconductor film and a catalyst element for promoting crystallization regarding the amorphous semiconductor film that forms the thin film transistor using said gate electrode and said mask material as a mask respectively, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added, and a fourth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 6
Independent Claim
152 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a doping impurity to the amorphous semiconductor film and a catalyst element for promoting crystallization regarding the amorphous semiconductor film that forms the thin film transistor using said gate electrode and said mask material as a mask respectively, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added, and a fourth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 7
Dependent Claim
21 words
A method of manufacturing a semiconductor circuit as defined in claim 4, wherein the annealing is applied in a hydrogen atmosphere.
Claim 8
Dependent Claim
30 words
A method of manufacturing a semiconductor circuit as defined in claim 4, wherein the mask material for the thin film diode is left after the formation of the semiconductor circuit.
Claim 9
Independent Claim
132 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a substantially amorphous semiconductor film on a substrate, a second step of introducing a catalyst element for promoting crystallization of amorphous semiconductor selectively to a region of said amorphous semiconductor film to form a thin film transistor at a concentration of 1×10 17 to 2×10 20 atoms/cm 3 , a third step of forming an insulation film, a gate electrode of the thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, a fourth step of adding a doping impurity to the amorphous semiconductor film using said gate electrode and said mask material as a mask and a fifth step of activating introduced impurity by applying heat annealing to said semiconductor film.
Claim 10
Independent Claim
132 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a substantially amorphous semiconductor film on a substrate, a second step of introducing a catalyst element for promoting crystallization of amorphous semiconductor selectively to a region of said amorphous semiconductor film to form a thin film transistor at a concentration of 1×10 17 to 2×10 20 atoms/cm 3 , a third step of forming an insulation film, a gate electrode of the thin film transistor and a mask material for a thin film diode on said amorphous semiconductor film, a fourth step of adding a doping impurity to the amorphous semiconductor film using said gate electrode and said mask material as a mask and a fifth step of activating introduced impurity by applying heat annealing to said semiconductor film.
Claim 11
Dependent Claim
21 words
A method of manufacturing a semiconductor circuit as defined in claim 7, wherein the annealing is applied in a hydrogen atmosphere.
Claim 12
Dependent Claim
29 words
A method of manufacturing a semiconductor circuit as defined in claim 7, wherein the mask material for the thin film diode is left after formation of the semiconductor circuit.
Claim 13
Independent Claim
120 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of introducing a catalyst element for promoting crystallization to said semiconductor film at a concentration of 1×10 17 to 2×10 20 atoms/cm 3 , a third step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said semiconductor film, a fourth step of adding a doping impurity to the semiconductor film using said gate electrode and said mask material as a mask and a fifth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 14
Independent Claim
120 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of introducing a catalyst element for promoting crystallization to said semiconductor film at a concentration of 1×10 17 to 2×10 20 atoms/cm 3 , a third step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said semiconductor film, a fourth step of adding a doping impurity to the semiconductor film using said gate electrode and said mask material as a mask and a fifth step of activating the introduced impurity by applying heat annealing to said semiconductor film.
Claim 15
Dependent Claim
21 words
A method of manufacturing a semiconductor circuit as defined in claim 10, wherein the annealing is applied in a hydrogen atmosphere.
Claim 16
Dependent Claim
29 words
A method of manufacturing a semiconductor circuit as defined in claim 10, wherein the mask material for the thin film diode is left after formation of the semiconductor circuit.
Claim 17
Independent Claim
172 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a catalyst element for promoting crystallization and a doping impurity of a first conductivity type to the semiconductor film using said gate electrode and said mask material as a mask, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added, a fourth step of forming a mask selectively on said semiconductor film and adding a second doping impurity of a conductivity type opposite to that of said first conduction type, and a fifth step of activating introduced impurity by applying heat annealing to said semiconductor film.
Claim 18
Independent Claim
172 words
A method of manufacturing a semiconductor circuit comprising: a first step of forming a semiconductor film substantially in an amorphous state on a substrate, a second step of forming an insulation film, a gate electrode of a thin film transistor and a mask material for a thin film diode on said semiconductor film, wherein said thin film transistor and said thin film diode is formed from said amorphous semiconductor film, a third step of adding a catalyst element for promoting crystallization and a doping impurity of a first conductivity type to the semiconductor film using said gate electrode and said mask material as a mask, wherein said catalyst element is added only to areas of said amorphous semiconductor film in which said doping impurity is added, a fourth step of forming a mask selectively on said semiconductor film and adding a second doping impurity of a conductivity type opposite to that of said first conduction type, and a fifth step of activating introduced impurity by applying heat annealing to said semiconductor film.
Claim 19
Dependent Claim
21 words
A method of manufacturing a semiconductor circuit as defined in claim 13, wherein the annealing is applied in a hydrogen atmosphere.
Claim 20
Dependent Claim
29 words
A method of manufacturing a semiconductor circuit as defined in claim 13, wherein the mask material for the thin film diode is left after formation of the semiconductor circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1999-03-26 | 1999-09-25 | 2000-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-26 | 2003-09-25 | 2004-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-26 | 2007-09-25 | 2008-03-26 | $7700.00 | Window Closed / Lapsed |