HCM based transconductor circuits

Claim 2

A transconductor circuit comprising: a first half cascode mirror circuit, comprising: first, second, and third transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors being connected in series between said first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of said second transistor, and having a current control element connected between said first reference current source and said first transistor; a first input signal receiving node being provided between said first and second transistors; and a first output circuit arranged to provide an output signal proportional to a current flowing in said second transistor; a second half cascode mirror circuit, comprising: fourth, fifth, and sixth transistors; a second reference current source having a connection at one side to a supply voltage and at another side to said fourth transistor; said fourth and fifth transistors being connected in series between said second reference current source and the first reference voltage, said fourth transistor having a current control element connected to the second reference voltage; said sixth transistor being connected between the supply voltage and a current control element of said fifth transistor, and having a current control element connected between said second reference current source and said fourth transistor; a second input signal receiving node being provided between said fourth and fifth transistors; and a second output circuit arranged to provide an output signal proportional to a current flowing in said fifth transistor.

Claim 3

The transconductor circuit of claim 1 further comprising first and second input resistors, connected between respective voltage input terminals and the respective collectors of said second and fifth transistors.

Claim 4

The transconductor circuit of claim 2 wherein said input resistors are equal.

Claim 5

The transconductor circuit of claim 1 wherein said first and second output circuits are a current mirror circuits connected to copy currents respectively in said second and fifth transistor.

Claim 6

The transconductor circuit of claim 4 wherein said first and second output circuits comprise respective seventh and eighth transistors, each having a current control element connected to a current control element respectively of said second and fifth transistors.

Claim 7

The transconductor circuit of claim 1 wherein said first, second, third, fourth, fifth, and sixth transistors are bipolar transistors.

Claim 8

The transconductor circuit of claim 6 wherein said first, second, third, fourth, fifth and sixth transistors are NPN transistors.

Claim 9

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to a second reference potential; and first and second output mirror circuits connected to mirror a current in a respectively one of said active transistors of said first and second half cascode mirror circuits; whereby, when a balanced input voltage is applied to respective voltage input nodes between said cascode and active transistors, corresponding balanced output currents are produced by said first and second output mirror circuits.

Claim 10

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to a second reference potential; and first and second output mirror circuits connected to mirror a current in a respectively one of said active transistors of said first and second half cascode mirror circuits; whereby, when a balanced input voltage is applied to respective voltage input nodes between said cascode and active transistors, corresponding balanced output currents are produced by said first and second output mirror circuits.

Claim 11

The transconductor circuit of claim 8 further comprising first and second input resistors, connected between the respective voltage input nodes and first and second respective input terminals.

Claim 12

The transconductor circuit of claim 9 wherein said input resistors are equal.

Claim 13

The transconductor circuit of claim 8 wherein said first and second output circuits are a current mirror circuits connected to copy currents respectively in said active transistors of said first and second half cascode mirror circuits.

Claim 14

The transconductor circuit of claim 11 wherein said first and second output circuits each comprise an output transistor having a base connected to the base of said active transistor of said half cascode mirror circuit with which said output circuit is associated.

Claim 15

The transconductor circuit of claim 12 wherein said aforenamed transistors are bipolar transistors.

Claim 16

The transconductor circuit of claim 13 wherein said transistors are NPN transistors.

Claim 17

The transconductor circuit of claim 8 further comprising a biasing current source connected between the first reference potential node and ground, and a biasing circuit connected to reference the second reference potential to a potential on the first reference potential node.

Claim 18

A transconductor circuit comprising: first and second hall cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between the current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising, an output current transistor and a level shifting transistor connected in series between an output terminal and the first reference potential node, a base of said output current transistor being connected to the base of said cascode transistor; and first and second floating level shifting current sources connected between the respective first reference potential nodes of said first and second half cascode mirror circuits and a ground potential; whereby, when a balanced voltage inputs are applied, corresponding balanced output currents are produced by said first and second output circuits.

Claim 19

A transconductor circuit comprising: first and second hall cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between the current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising, an output current transistor and a level shifting transistor connected in series between an output terminal and the first reference potential node, a base of said output current transistor being connected to the base of said cascode transistor; and first and second floating level shifting current sources connected between the respective first reference potential nodes of said first and second half cascode mirror circuits and a ground potential; whereby, when a balanced voltage inputs are applied, corresponding balanced output currents are produced by said first and second output circuits.

Claim 20

The transconductor circuit of claim 16 wherein all of said transistors are bipolar transistors.

Claim 21

The transconductor circuit of claim 17 wherein said transistors are NPN transistors.

Claim 22

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between the current source and a first reference potential node; a base bias resistor; said base current compensating transistor being connected in series with said base bias resistor between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising an output current transistor connected in parallel with a respective active transistor of said first and second half cascode mirror circuits; and first and second floating level shifting current sources connected between the respective first reference potential nodes of said first and second half cascode mirror circuits and a ground potential.

Claim 23

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between the current source and a first reference potential node; a base bias resistor; said base current compensating transistor being connected in series with said base bias resistor between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising an output current transistor connected in parallel with a respective active transistor of said first and second half cascode mirror circuits; and first and second floating level shifting current sources connected between the respective first reference potential nodes of said first and second half cascode mirror circuits and a ground potential.

Claim 24

The transconductor circuit of claim 19 wherein each of said first and second half cascode mirror circuits further comprises a feed forward capacitor connected between the base of said base current compensating transistor and the base of said active transistor.

Claim 25

The transconductor circuit of claim 20 wherein said feed forward capacitors and said base bias resistors of said first and second half cascode mirror circuits are of equal value.

Claim 26

The transconductor circuit of claim 19 wherein all of said transistors are bipolar transistors.

Claim 27

The transconductor circuit of claim 22 wherein said transistors are NPN transistors.

Claim 28

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; a base bias resistor; said base current compensating transistor being connected in series with said base bias resistor between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising an output current transistor having an emitter, a base, and a collector, the base of said output current transistor being connected to the base of a respective active transistor of said first and second half cascode mirror circuits; and a floating level shifting current source connected between the supply voltage source and said output current transistors of said first and second half cascode mirror circuits.

Claim 29

A transconductor circuit comprising: first and second half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; a base bias resistor; said base current compensating transistor being connected in series with said base bias resistor between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and second half cascode mirror circuits being connected to receive balanced voltage inputs; a resistor connected between a junction in each said first and second half cascode mirror circuits between said active and cascode transistors; and first and second output circuits connected to mirror a current in said first and second half cascode mirror circuits, each output circuit comprising an output current transistor having an emitter, a base, and a collector, the base of said output current transistor being connected to the base of a respective active transistor of said first and second half cascode mirror circuits; and a floating level shifting current source connected between the supply voltage source and said output current transistors of said first and second half cascode mirror circuits.

Claim 30

The transconductor circuit of claim 24 wherein each of said first and second half cascode mirror circuits further comprises a feedforward capacitor connected between the base of said base current compensating transistor and the base of said active transistor.

Claim 31

The transconductor circuit of claim 25 wherein said feed forward capacitors and said base bias resistors are of equal value.

Claim 32

The transconductor circuit of claim 24 wherein said transistors of said first and second half cascode mirror circuits are NPN transistors, and said output current transistors are PNP transistors.

Claim 33

A transconductor circuit comprising: a first cascode mirror circuit, comprising: first, second, and third transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors being connected in series between said first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of said second transistor, and having a current control element connected between said first reference current source and said first transistor; and a first output circuit arranged to provide an output signal proportional to a current flowing in said second transistor; a second cascode mirror circuit, comprising: fourth, fifth, and sixth transistors; a second reference current source having a connection at one side to a supply voltage and at another side to said fourth transistor; said fourth and fifth transistors being connected in series between said second reference current source and said first reference voltage, said fourth transistor having a current control element connected to the second reference voltage; said sixth transistor being connected between the supply voltage and a current control element of said fifth transistor, and having a current control element connected between said second reference current source and said fourth transistor; and a second output circuit arranged to provide an output signal proportional to a current flowing in said fifth transistor; a first nonlinearity correction circuit associated with said first cascode mirror circuit, comprising: a seventh and eighth transistors and a third reference current source, connected in series between the supply voltage and a junction between said fourth and fifth transistors of said second cascode mirror circuit, a control element of said seventh transistor being connected to receive a first input voltage signal, and a control element of said eighth transistor being connected to said second reference voltage; a second nonlinearity correction circuit associated with said first cascode mirror circuit, comprising: a ninth and tenth transistors and a fourth reference current source, connected in series between the supply voltage and a junction between said first and second transistors of said first cascode mirror circuit, a control element of said ninth transistor being connected to receive a second input voltage signal, and a control element of said tenth transistor being connected to said second reference voltage; a first resistor being connected between junctions of said first and second and said fourth and fifth transistors of said first and second cascode mirror circuits; a second resistor being connected between junctions of said seventh transistor with said third reference current source and said ninth transistor with said fourth reference current source.

Claim 34

A transconductor circuit comprising: a first cascode mirror circuit, comprising: first, second, and third transistors; a first reference current source having a connection at one side to a supply voltage and at another side to said first transistor; said first and second transistors being connected in series between said first reference current source and a first reference voltage, said first transistor having a current control element connected to a second reference voltage; said third transistor being connected between the supply voltage and a current control element of said second transistor, and having a current control element connected between said first reference current source and said first transistor; and a first output circuit arranged to provide an output signal proportional to a current flowing in said second transistor; a second cascode mirror circuit, comprising: fourth, fifth, and sixth transistors; a second reference current source having a connection at one side to a supply voltage and at another side to said fourth transistor; said fourth and fifth transistors being connected in series between said second reference current source and said first reference voltage, said fourth transistor having a current control element connected to the second reference voltage; said sixth transistor being connected between the supply voltage and a current control element of said fifth transistor, and having a current control element connected between said second reference current source and said fourth transistor; and a second output circuit arranged to provide an output signal proportional to a current flowing in said fifth transistor; a first nonlinearity correction circuit associated with said first cascode mirror circuit, comprising: a seventh and eighth transistors and a third reference current source, connected in series between the supply voltage and a junction between said fourth and fifth transistors of said second cascode mirror circuit, a control element of said seventh transistor being connected to receive a first input voltage signal, and a control element of said eighth transistor being connected to said second reference voltage; a second nonlinearity correction circuit associated with said first cascode mirror circuit, comprising: a ninth and tenth transistors and a fourth reference current source, connected in series between the supply voltage and a junction between said first and second transistors of said first cascode mirror circuit, a control element of said ninth transistor being connected to receive a second input voltage signal, and a control element of said tenth transistor being connected to said second reference voltage; a first resistor being connected between junctions of said first and second and said fourth and fifth transistors of said first and second cascode mirror circuits; a second resistor being connected between junctions of said seventh transistor with said third reference current source and said ninth transistor with said fourth reference current source.

Claim 35

The transconductor circuit of claim 28 wherein said first, second, third, fourth, fifth, and sixth transistors are NPN bipolar transistors, and wherein said seventh, eighth, ninth, and tenth transistors are MOS FET transistors.

Claim 36

The transconductor circuit of claim 28 wherein said first and second resistors are equal.

Claim 37

The transconductor circuit of claim 28 wherein said first and second output circuits are a current mirror circuits connected to copy currents respectively in said second and fifth transistor.

Claim 38

The transconductor circuit of claim 31 wherein said first and second output circuits comprise respective eleventh and twelfth transistors, each having a current control element connected to a current control element respectively of said second and fifth transistors.

Claim 39

A Class AB transconductor circuit, comprising: first, second, third and fourth half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and third half cascode mirror circuits being connected to a second reference potential; the bases of said cascode transistors of said second and fourth half cascode mirror circuits being connected to receive an input voltage; a first resistor connected between junctions between said active and cascode transistors of said first and second half cascode mirror circuits; a second resistor connected between junctions between said active and cascode transistors of said third and fourth half cascode mirror circuits; and an output circuit comprising two output transistors connected in series between first and second current output terminals, each having a base element connected to be controlled by a potential on respective ones of said first and second resistors.

Claim 40

A Class AB transconductor circuit, comprising: first, second, third and fourth half cascode mirror circuits, each comprising: a cascode transistor, an active transistor, and a base current compensating transistor, each having an emitter, a base, and a collector; and a current source connected at one side to a supply voltage and at another side to said cascode transistor; said cascode and active transistors being connected in series between said current source and a first reference potential node; said base current compensating transistor being connected between the supply voltage and the base of said active transistor, and having its base connected between said current source and said cascode transistor; the bases of said cascode transistors of said first and third half cascode mirror circuits being connected to a second reference potential; the bases of said cascode transistors of said second and fourth half cascode mirror circuits being connected to receive an input voltage; a first resistor connected between junctions between said active and cascode transistors of said first and second half cascode mirror circuits; a second resistor connected between junctions between said active and cascode transistors of said third and fourth half cascode mirror circuits; and an output circuit comprising two output transistors connected in series between first and second current output terminals, each having a base element connected to be controlled by a potential on respective ones of said first and second resistors.

Claim 41

The Class AB transconductor circuit of claim 33 wherein said cascode, active, and base current compensating transistors of said first and second half cascode mirror circuits are NPN transistors, and said cascode, active, and base current compensating transistors of said third and fourth half cascode mirror circuits are PNP transistors.

Claim 42

The Class AB transconductor circuit of claim 34 wherein said two output transistors are an NPN transistor connected to be controlled by a potential on said second resistor and a PNP transistor connected to be controlled by a potential on said first resistor.

Claim 43

The Class AB transconductor circuit of claim 33 further comprising an input resistor connected to apply an input voltage on an input terminal to the bases of said cascode transistors of said second and fourth half cascode mirror circuits, and wherein said input resistor has a value of one half of the resistance of each of said first and second resistors.