US5498893A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having SOI substrate and fabrication method thereof
Assignee: Fujitsu Ltd
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Filing: 1995-06-07
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Granted: 1996-03-12
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Expires: 2015-06-07
Abstract
Abstract A semiconductor device includes a semiconductor layer which has a first surface, and a second surface which is comparatively lower than the first surface. The semiconductor device also has a first material layer formed over the second surface, which includes a first inorganic material which has a hardness exceeding that of the semiconductor layer. The semiconductor device also includes a second material layer which has a hardness less than that of the first material layer, and which is formed in a gap between a sidewall of the first material layer and a sidewall between the first and second surfaces. The first surface of the semiconductor layer is formed by lapping until the first surface of the semiconductor layer is impeded by the first material layer so that the first surface of the semiconductor layer is substantially flush with a top surface of the first material layer.
Inventors
- 👤 Shouji Usui
- 👤 Taketoshi Inagaki
- 👤 Kiyomasa Kamei
- 👤 Takeshi Matsutani
- 👤 Kazunori Imaoka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 07:35
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/201; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D86/01; H10P; H10P52/00; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P90/1914; H10W10/011; H10W10/012; H10W10/13; Y; Y10; Y10S; Y10S148/00; Y10S148/135
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
292 words
A semiconductor device comprising: a support substrate of a semiconductor material having a hardness; an insulator chip provided on said support substrate, said insulator chip being defined by an upper major surface and a lower major surface; an active region formed of the semiconductor material identically as used in said support substrate, said active region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, said active region having a side wall; a first material region including an inorganic material having a hardness exceeding the hardness of the semiconductor material forming said active region, said first material region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, the first material region having a side wall opposing the side wall of said active region to define a gap therebetween; a second material region including polysilicon and having a hardness substantially equal to the hardness of the semiconductor material forming said active region, said second material region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, said second material region having a first side wall contacting with the side wall of said active region and a second side wall contacting with the side wall of said first material region; and at least one active device formed in said active region, the upper major surfaces of said active region, said first material region and said second material region being substantially level due to polishing of the upper major surfaces of said active region and said second material region until the polishing is impeded by the upper major surface of said first material region.
Claim 2
Dependent Claim
292 words
A semiconductor device comprising: a support substrate of a semiconductor material having a hardness; an insulator chip provided on said support substrate, said insulator chip being defined by an upper major surface and a lower major surface; an active region formed of the semiconductor material identically as used in said support substrate, said active region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, said active region having a side wall; a first material region including an inorganic material having a hardness exceeding the hardness of the semiconductor material forming said active region, said first material region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, the first material region having a side wall opposing the side wall of said active region to define a gap therebetween; a second material region including polysilicon and having a hardness substantially equal to the hardness of the semiconductor material forming said active region, said second material region having an upper major surface and a lower major surface contacting with the upper major surface of said insulator chip, said second material region having a first side wall contacting with the side wall of said active region and a second side wall contacting with the side wall of said first material region; and at least one active device formed in said active region, the upper major surfaces of said active region, said first material region and said second material region being substantially level due to polishing of the upper major surfaces of said active region and said second material region until the polishing is impeded by the upper major surface of said first material region.
Claim 3
Dependent Claim
18 words
A semiconductor device as claimed in claim 1, wherein said active region includes a single crystal of silicon.
Claim 4
Dependent Claim
16 words
A semiconductor device as claimed in claim 1, wherein said first material region includes silicon oxide.
Claim 5
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor layer having a first surface and a hardness; an insulator layer contacting said semiconductor layer, having a second surface below the first surface; a support substrate carrying said insulator layer thereon, said support substrate having a composition identical to said semiconductor layer; a first material layer formed over the second surface, of a first inorganic material including silicon oxide and having a hardness exceeding the hardness of said semiconductor layer; and a second material layer including polysilicon, having a hardness softer than the hardness of said first material layer, formed in a gap between a side wall of said first material layer and a side wall of the semiconductor layer between the first and second surfaces, the first surface of said semiconductor layer being formed by polishing of the first surface of said semiconductor layer until the polishing is impeded by said first material layer so that the first surface of said semiconductor layer is substantially flush with a top surface of said first material layer.
Claim 6
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor layer having a first surface and a hardness; an insulator layer contacting said semiconductor layer, having a second surface below the first surface; a support substrate carrying said insulator layer thereon, said support substrate having a composition identical to said semiconductor layer; a first material layer formed over the second surface, of a first inorganic material including silicon oxide and having a hardness exceeding the hardness of said semiconductor layer; and a second material layer including polysilicon, having a hardness softer than the hardness of said first material layer, formed in a gap between a side wall of said first material layer and a side wall of the semiconductor layer between the first and second surfaces, the first surface of said semiconductor layer being formed by polishing of the first surface of said semiconductor layer until the polishing is impeded by said first material layer so that the first surface of said semiconductor layer is substantially flush with a top surface of said first material layer.
Claim 7
Dependent Claim
166 words
A semiconductor device having a surface, comprising: a support substrate of a semiconductor material having a hardness; an insulator layer formed on said support substrate; a semiconductor layer formed of the semiconductor material on said insulator layer and having a surface and a side; a first material layer having a surface and first and second sides, the first side of said first material layer contacting the side of semiconductor layer, said first material layer formed of a first inorganic material including polysilicon and having a hardness; and a second material layer having a surface and a side, the side of said second material layer contacting with the second side of said first material layer, said second material layer formed of a second inorganic material having a hardness greater than the hardness of said first material layer and the hardness of said semiconductor layer, the surfaces of said semiconductor layer, said first material layer and said second material layer coinciding with the surface of said semiconductor device.
Claim 8
Dependent Claim
166 words
A semiconductor device having a surface, comprising: a support substrate of a semiconductor material having a hardness; an insulator layer formed on said support substrate; a semiconductor layer formed of the semiconductor material on said insulator layer and having a surface and a side; a first material layer having a surface and first and second sides, the first side of said first material layer contacting the side of semiconductor layer, said first material layer formed of a first inorganic material including polysilicon and having a hardness; and a second material layer having a surface and a side, the side of said second material layer contacting with the second side of said first material layer, said second material layer formed of a second inorganic material having a hardness greater than the hardness of said first material layer and the hardness of said semiconductor layer, the surfaces of said semiconductor layer, said first material layer and said second material layer coinciding with the surface of said semiconductor device.
Claim 9
Dependent Claim
18 words
A semiconductor device as claimed in claim 5, wherein the semiconductor layer includes a single crystal of silicon.
Claim 10
Dependent Claim
16 words
A semiconductor device as claimed in claim 5, wherein the second material layer includes silicon oxide.
Claim 11
Dependent Claim
15 words
A semiconductor device as claimed in claim 7, wherein the second material layer includes polysilicon.
Claim 12
Dependent Claim
15 words
A semiconductor device as claimed in claim 6, wherein the first material layer includes polysilicon.
Claim 13
Dependent Claim
16 words
A semiconductor device as claimed in claim 6, wherein the second material layer includes silicon oxide.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-03-12 | 1999-09-11 | 2000-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-03-12 | 2003-09-11 | 2004-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-03-12 | 2007-09-11 | 2008-03-12 | $7700.00 | Window Closed / Lapsed |