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US5495114A Expired / Lapsed US ⏱️ 0.0 years remaining

Miniaturized electronic imaging chip

Assignee: Individual
•
Filing: 1993-11-22
•
Granted: 1996-02-27
•
Expires: 2013-11-22
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Abstract

Abstract A miniaturized electronic imaging chip has stratified layers wherein a base silicon layer has a peripheral edge defining an area and a thickness which allows passage therethrough of most UV, visible and IR light. A pixel layer is formed on the back side of this first silicon layer. At least one interconnect layer is bonded to the pixel layer. Electric leads are bump bonded to the bonding pads on the outermost interconnect layer and extend away from it within the area for attachment to means for sensing electrical signals generated by an image projected onto the pixel layer through the silicon layer. Preferably, the leads are perpendicular to the chip. A unique method of manufacturing the miniaturized electronic imaging chip from a standard CCD, having a peripheral edge defining a first area, comprises the steps of shaving a silicon substrate, having a peripheral edge defining a second area which is smaller than the first area, on the back side of the standard CCD to a thickness which allows passage of a light image therethrough. The CCD then is reversed so that the image is projected through the thinner back side of the silicon substrate. Leads are bumped bonded to the former front surface of the CCD within the smaller second area for supplying electrical signals to and from the CCD.

Inventors

  • 👤 Edwin L. Adair

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 09:15
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10F39/156; A; A61; A61B; A61B1/00; A61B1/00163; A61B1/00193; A61B1/04; A61B1/05; H10W; H10W72/00; H10W72/50; H10W72/531; H10W72/536; Y; Y10; Y10S; Y10S438/00; Y10S438/977

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 128 words
A miniaturized electronic imaging chip comprising: a generally rectangular silicon base layer having a thickness which allows a light image to pass therethrough, said silicon layer having a first side, through which the image is projected, and a second side; a pixel layer having a first and second side, said first side of said pixel layer being attached to said second side of said silicon layer, said pixel layer further having a peripheral edge; at least one interconnect layer bonded to said second side of said pixel layer; and electrical leads bonded to and extending substantially perpendicular from said interconnect layer and within an area defined by said peripheral edge of said pixel layer for attachment to means for transmitting electrical signals to and from said pixel layer.
Claim 2
Dependent Claim 128 words
A miniaturized electronic imaging chip comprising: a generally rectangular silicon base layer having a thickness which allows a light image to pass therethrough, said silicon layer having a first side, through which the image is projected, and a second side; a pixel layer having a first and second side, said first side of said pixel layer being attached to said second side of said silicon layer, said pixel layer further having a peripheral edge; at least one interconnect layer bonded to said second side of said pixel layer; and electrical leads bonded to and extending substantially perpendicular from said interconnect layer and within an area defined by said peripheral edge of said pixel layer for attachment to means for transmitting electrical signals to and from said pixel layer.
Claim 3
Dependent Claim 18 words
Apparatus, as claimed in claim 1, wherein: said silicon layer as a thickness between 3 and 200 microns.
Claim 4
Dependent Claim 18 words
Apparatus, as claimed in claim 1, wherein: said silicon layer has a thickness between 6 and 10 microns.
Claim 5
Dependent Claim 15 words
Apparatus, as claimed in claim 1, wherein: said electrical leads are indium bump bonded leads.
Claim 6
Dependent Claim 24 words
Apparatus, as claimed in claim 1, wherein: said silicon layer has light transmitting qualities which allow passage of UV, visible and IR light therethrough.

References Cited (Backward Citations)

US3520587A Cited
US4786965A Cited
US4895431A Cited
US4926257A Cited
US4862873A Cited
US4924853A Cited
US5173756A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-02-26 1999-08-28 2000-02-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-02-26 2003-08-28 2004-02-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-02-26 2007-08-28 2008-02-27 $7700.00 Window Closed / Lapsed

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