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US5491107A
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Semiconductor processing method for providing large grain polysilicon films
Assignee: Micron Technology Inc
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Filing: 1995-04-21
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Granted: 1996-02-13
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Expires: 2015-04-21
Abstract
Abstract A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprises the following sequential steps: a) depositing a first layer of arsenic atop a semiconductor wafer; b) depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; c) first annealing the wafer at a temperature of at least about 600° C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote growth of large polysilicon grains; and d) with the second layer outer surface being outwardly exposed, second annealing the wafer at a temperature effectively higher than the first annealing temperature for a time period sufficient to outgas arsenic from the polysilicon layer. As an alternate consideration, the layer of silicon could be in situ provided with an effective quantity of As during deposition.
Inventors
- 👤 Charles L. Turner
- 👤 Monte Manning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 08:22
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10P14/3442; H10P14/38; H10P14/3802
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
120 words
A semiconductor processing method of providing a polysilicon thin film transistor layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer; depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and with the second layer outer surface being outwardly exposed, outgassing arsenic from the polysilicon layer.
Claim 2
Dependent Claim
120 words
A semiconductor processing method of providing a polysilicon thin film transistor layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer; depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and with the second layer outer surface being outwardly exposed, outgassing arsenic from the polysilicon layer.
Claim 3
Dependent Claim
25 words
The semiconductor processing method of claim 1 wherein the first layer is deposited to a thickness of less than or equal to about 20 Angstroms.
Claim 4
Dependent Claim
25 words
The semiconductor processing method of claim 1 wherein the first layer is deposited to a thickness of less than or equal to about 5 Angstroms.
Claim 5
Dependent Claim
25 words
The semiconductor processing method of claim 1 wherein the first layer is deposited to a thickness of from about 1 Angstrom to about 2 Angstroms.
Claim 6
Dependent Claim
25 words
The semiconductor processing method of claim 1 wherein the second layer is deposited to a thickness of from about 300 Angstroms to about 400 Angstroms.
Claim 7
Dependent Claim
22 words
The semiconductor processing method of claim 1 wherein the outgassing is conducted at a temperature effectively higher than the first annealing temperature.
Claim 8
Dependent Claim
20 words
The semiconductor processing method of claim 1 wherein the outgassing is conducted at a temperature greater than about 900° C.
Claim 9
Dependent Claim
38 words
The semiconductor processing method of claim 1 wherein the second layer is deposited to a thickness of from about 300 Angstroms to about 400 Angstroms, and the outgassing is conducted at a temperature greater than about 900° C.
Claim 10
Dependent Claim
55 words
The semiconductor processing method of claim 1 wherein the first layer is deposited to a thickness of less than or equal to about 20 Angstroms, the second layer is deposited to a thickness of from about 300 Angstroms to about 400 Angstroms, and the outgassing is conducted at a temperature greater than about 900° C.
Claim 11
Dependent Claim
18 words
The semiconductor processing method of claim 1 wherein the second layer of silicon as deposited is substantially amorphous.
Claim 12
Dependent Claim
18 words
The semiconductor processing method of claim 1 wherein the second layer of silicon as deposited is substantially polycrystalline.
Claim 13
Dependent Claim
29 words
The semiconductor processing method of claim 1 wherein the first annealing temperature is about 600° C. and the outgassing is conducted at a temperature greater than about 900° C.
Claim 14
Dependent Claim
36 words
The semiconductor processing method of claim 1 wherein the first layer is deposited to a thickness of less than or equal to about 20 Angstroms, and the second layer of silicon as deposited is substantially polycrystalline.
Claim 15
Dependent Claim
156 words
A semiconductor processing method of providing a polysilicon thin film transistor layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer to a thickness of less than or equal to about 5 Angstroms; depositing a second layer of silicon over the arsenic layer to a thickness of from about 300 Angstroms to about 400 Angstroms, the second layer having an outer surface; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart crystallization in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and outgassing arsenic from the wafer by second annealing the wafer at a temperature of at least about 900° C. for a time period sufficient to outgas arsenic from the polysilicon layer.
Claim 16
Dependent Claim
156 words
A semiconductor processing method of providing a polysilicon thin film transistor layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer to a thickness of less than or equal to about 5 Angstroms; depositing a second layer of silicon over the arsenic layer to a thickness of from about 300 Angstroms to about 400 Angstroms, the second layer having an outer surface; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart crystallization in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and outgassing arsenic from the wafer by second annealing the wafer at a temperature of at least about 900° C. for a time period sufficient to outgas arsenic from the polysilicon layer.
Claim 17
Dependent Claim
141 words
A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer; depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; providing a capping layer atop the second layer outer surface to prevent arsenic out-diffusion from the second layer during a first annealing step; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; removing the capping layer; and with the capping layer being removed, outgassing arsenic from the polysilicon layer.
Claim 18
Dependent Claim
141 words
A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer; depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; providing a capping layer atop the second layer outer surface to prevent arsenic out-diffusion from the second layer during a first annealing step; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; removing the capping layer; and with the capping layer being removed, outgassing arsenic from the polysilicon layer.
Claim 19
Dependent Claim
180 words
A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer to a thickness of less than or equal to about 5 Angstroms; depositing a second layer of silicon over the arsenic layer to a thickness of from about 300 Angstroms to about 400 Angstroms, the second layer having an outer surface; providing a capping layer atop the second layer outer surface to prevent arsenic out-diffusion from the second layer during a first annealing step; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart crystallization in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and removing the capping layer; outgassing arsenic from the wafer by second annealing the wafer at a temperature of at least about 900° C. for a time period sufficient to outgas arsenic from the polysilicon layer.
Claim 20
Dependent Claim
180 words
A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprising the following sequential steps: depositing a first layer of arsenic atop a semiconductor wafer to a thickness of less than or equal to about 5 Angstroms; depositing a second layer of silicon over the arsenic layer to a thickness of from about 300 Angstroms to about 400 Angstroms, the second layer having an outer surface; providing a capping layer atop the second layer outer surface to prevent arsenic out-diffusion from the second layer during a first annealing step; first annealing the wafer at a temperature of at least about 550° C. for a time period sufficient to impart crystallization in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote size growth of individual polysilicon grains; and removing the capping layer; outgassing arsenic from the wafer by second annealing the wafer at a temperature of at least about 900° C. for a time period sufficient to outgas arsenic from the polysilicon layer.
References Cited (Backward Citations)
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