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US5488247A Expired / Lapsed US ⏱️ 0.0 years remaining

MOS-type semiconductor clamping circuit

Assignee: Mitsubishi Electric Corp
•
Filing: 1994-07-20
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Granted: 1996-01-30
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Expires: 2014-07-20
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Abstract

Abstract A MOS-type semiconductor clamping circuit includes a semiconductor substrate receiving a substrate potential, a well isolated electrically from the substrate potential, and MOS-type transistors formed in the well. Those transistors are connected with each other in series, each transistor has its gate connected to its drain, and a stable potential different from the substrate potential is applied to the well.

Inventors

  • 👤 Mikio Sakurai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:40
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; Y; Y10; Y10S; Y10S257/00; Y10S257/928

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 103 words
A MOS-type semiconductor clamping circuit, comprising: a semiconductor substrate receiving a substrate potential; at least one well of first conductivity type formed in said semiconductor substrate and isolated electrically from said substrate potential; and a plurality of MOS-type transistors each having a source and a drain of second conductivity type formed in said well, each of said plurality of transistors having its gate connected to its drain, those transistors being connected in series with each other, and a stable potential, different from said substrate potential, being applied to said well, providing a constant backgate potential for each of said plurality of MOS-type transistors.
Claim 2
Dependent Claim 103 words
A MOS-type semiconductor clamping circuit, comprising: a semiconductor substrate receiving a substrate potential; at least one well of first conductivity type formed in said semiconductor substrate and isolated electrically from said substrate potential; and a plurality of MOS-type transistors each having a source and a drain of second conductivity type formed in said well, each of said plurality of transistors having its gate connected to its drain, those transistors being connected in series with each other, and a stable potential, different from said substrate potential, being applied to said well, providing a constant backgate potential for each of said plurality of MOS-type transistors.
Claim 3
Dependent Claim 37 words
The clamping circuit according to claim 1, wherein said substrate is of the first conductivity type, and said well of the first conductivity type is formed in a well of second conductivity type formed in said substrate.
Claim 4
Dependent Claim 18 words
The clamping circuit according to claim 1, wherein a separate well is provided for each of said transistors.
Claim 5
Dependent Claim 18 words
The clamping circuit according to claim 2, wherein a separate well is provided for each of said transistors.
Claim 6
Dependent Claim 31 words
The clamping circuit according to claim 1, wherein said first and second conductivity types are P-type and N-type, respectively, and a ground potential is applied to said first conductivity type well.
Claim 7
Dependent Claim 31 words
The clamping circuit according to claim 2, wherein said first and second conductivity types are P-type and N-type, respectively, and a ground potential is applied to said first conductivity type well.
Claim 8
Dependent Claim 31 words
The clamping circuit according to claim 3, wherein said first and second conductivity types are P-type and N-type, respectively, and a ground potential is applied to said first conductivity type well.
Claim 9
Dependent Claim 35 words
The clamping circuit according to claim 1, wherein said first and second conductivity types are N-type and P-type, respectively, and a stable high level power supply potential is applied to said first conductivity type well.
Claim 10
Dependent Claim 35 words
The clamping circuit according to claim 2, wherein said first and second conductivity types are N-type and P-type, respectively, and a stable high level power supply potential is applied to said first conductivity type well.
Claim 11
Dependent Claim 35 words
The clamping circuit according to claim 3, wherein said first and second conductivity types are N-type and P-type, respectively, and a stable high level power supply potential is applied to said first conductivity type well.

References Cited (Backward Citations)

US5251172A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-01-29 1999-07-31 2000-01-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-01-29 2003-07-31 2004-01-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-01-29 2007-07-31 2008-01-30 $7700.00 Window Closed / Lapsed

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