Multistage amplifier with hybrid nested miller compensation

Claim 2

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage has at least one non-inverting input, said first stage being inverting and its output serving as the amplifier output, said second stage being inverting and its output being connected to the first inverting stage input, said third stage being inverting and its output being connected to the second inverting stage input, said fourth stage output being connected to the third inverting stage input, said fourth stage input serving as the amplifier input.

Claim 3

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage has at least one non-inverting input, said fourth stage output serves as the amplifier output, said first stage being inverting and its output being connected to the fourth stage input, said second stage being inverting and its output being connected to the first inverting stage input, said third stage being inverting and its output being connected to the second inverting stage input, said third inverting stage input serving as the amplifier input.

Claim 4

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage has at least one non-inverting input, said fourth stage output serves as the amplifier output, said first stage being inverting and its output being connected to the fourth stage input, said second stage being inverting and its output being connected to the first inverting stage input, said third stage being inverting and its output being connected to the second inverting stage input, said third inverting stage input serving as the amplifier input.

Claim 5

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage is a non-inverting stage, said third stage being inverting and its output serving as the amplifier output, said fourth stage output being connected to the third inverting stage input, said first stage being inverting and its output being connected to the fourth stage input, said second stage being inverting and its output being connected to the first inverting stage input, said second inverting stage input serving as the amplifier input.

Claim 6

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage is a non-inverting stage, said third stage being inverting and its output serving as the amplifier output, said fourth stage output being connected to the third inverting stage input, said first stage being inverting and its output being connected to the fourth stage input, said second stage being inverting and its output being connected to the first inverting stage input, said second inverting stage input serving as the amplifier input.

Claim 7

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage is a non-inverting stage, said second stage being inverting and its output serving as the amplifier output, said third stage being inverting and its output being connected to the second inverting stage input, said fourth stage output being connected to the third inverting stage input, said first stage being inverting and its output being connected to the fourth stage input, said first inverting stage input serving as the amplifier input.

Claim 8

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein said fourth stage is a non-inverting stage, said second stage being inverting and its output serving as the amplifier output, said third stage being inverting and its output being connected to the second inverting stage input, said fourth stage output being connected to the third inverting stage input, said first stage being inverting and its output being connected to the fourth stage input, said first inverting stage input serving as the amplifier input.

Claim 9

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising a fifth stage having input and output connections, said fifth stage input being connected to the input of the fourth stage, said fifth stage output being connected to the input of the first stage, said fifth stage being of the same signal transfer polarity as the fourth stage.

Claim 10

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising a fifth stage having input and output connections, said fifth stage input being connected to the input of the fourth stage, said fifth stage output being connected to the input of the first stage, said fifth stage being of the same signal transfer polarity as the fourth stage.

Claim 11

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein the first, second and third Miller capacitors have values satisfying the following two equations: gm2/Cm1≧(1/2)·(gm1/C.sub.load)·(Cm2/Cm3), and gm4/Cm3≧(1/2)·(gm2/Cm1)·(Cm3/Cm2), wherein gm1 is the transconductance of the first stage, gm2 is the transconductance of the second stage, gm3 is the transconductance of the third stage, gm4 is the transconductance of the fourth stage, Cm1, Cm2, and Cm3 are, respectively, the value of the first, second, and third Miller capacitors, and C load is the load capacitance of the first stage.

Claim 12

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; wherein the first, second and third Miller capacitors have values satisfying the following two equations: gm2/Cm1≧(1/2)·(gm1/C.sub.load)·(Cm2/Cm3), and gm4/Cm3≧(1/2)·(gm2/Cm1)·(Cm3/Cm2), wherein gm1 is the transconductance of the first stage, gm2 is the transconductance of the second stage, gm3 is the transconductance of the third stage, gm4 is the transconductance of the fourth stage, Cm1, Cm2, and Cm3 are, respectively, the value of the first, second, and third Miller capacitors, and C load is the load capacitance of the first stage.

Claim 13

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising fifth and sixth stages each having input and output, a fourth Miller capacitor connecting the output and input of the fifth stage, and a fifth capacitor directly connecting the output of the sixth stage to the output of the first stage, the first through fifth stages being inverting stages.

Claim 14

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising fifth and sixth stages each having input and output, a fourth Miller capacitor connecting the output and input of the fifth stage, and a fifth capacitor directly connecting the output of the sixth stage to the output of the first stage, the first through fifth stages being inverting stages.

Claim 15

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising fifth, sixth, seventh and eighth stages each having an input and an output, a fourth Miller capacitor connecting the output and input of the fifth stage, a fifth Miller capacitor connecting the output and input of the seventh stage, a sixth capacitor directly connecting the output of the eighth stage to the output of the fifth stage, and a seventh capacitor directly connecting the output of the eighth stage to the output of the first stage, the first through seventh stages being inverting stages.

Claim 16

A high-quality amplifier circuit having an input and an output and comprising: (a) a first stage having input and output connections; (b) a second stage having input and output connections; (c) a third stage having input and output connections; (d) a fourth stage having input and output connections; (e) a first Miller capacitor connected between the first stage output and input; (f) a second Miller capacitor connected between the third stage output and input; (g) a third Miller capacitor connected between the first stage output and the third stage input; (h) said first, second, and third stages being inverting stages; and (i) means for intercoupling given respective ones of said input and output connections so as to form said high-quality amplifier circuit; further comprising fifth, sixth, seventh and eighth stages each having an input and an output, a fourth Miller capacitor connecting the output and input of the fifth stage, a fifth Miller capacitor connecting the output and input of the seventh stage, a sixth capacitor directly connecting the output of the eighth stage to the output of the fifth stage, and a seventh capacitor directly connecting the output of the eighth stage to the output of the first stage, the first through seventh stages being inverting stages.

Claim 17

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said fourth, third, second and first amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 18

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said fourth, third, second and first amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 19

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said third, second, first and fourth amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 20

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said third, second, first and fourth amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 21

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said second, first, fourth and third amplifier stages are connected in cascade in the order named between said input terminal and said output terminal.

Claim 22

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said second, first, fourth and third amplifier stages are connected in cascade in the order named between said input terminal and said output terminal.

Claim 23

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output ok the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said first, fourth, third and second amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 24

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output ok the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said first, fourth, third and second amplifier stages being connected in cascade in the order named between said input terminal and said output terminal.

Claim 25

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said third capacitor being coupled between the output of the first amplifier stage and the input of the third amplifier stage such that three inverting amplifier stages are present between its capacitor terminals.

Claim 26

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and said third capacitor being coupled between the output of the first amplifier stage and the input of the third amplifier stage such that three inverting amplifier stages are present between its capacitor terminals.

Claim 27

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and at most one of said amplifier stages comprising a differential amplifier stage.

Claim 28

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and at most one of said amplifier stages comprising a differential amplifier stage.

Claim 29

The multistage amplifier circuit as claimed in claim 14, wherein the input amplifier stage comprises said differential amplifier stage and the output amplifier stage comprises a single-ended transistor amplifier stage.

Claim 30

The multistage amplifier circuit as claimed in claim 14, wherein the output amplifier stage comprises said differential amplifier stage and the input amplifier stage comprises a single-ended transistor amplifier stage.

Claim 31

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; a fifth amplifier stage being provided having an input coupled to said input terminal and an output coupled to the input of the output amplifier stage of the cascade; and said third capacitor functioning as a negative feedback circuit between the first and third amplifier stages.

Claim 32

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; a fifth amplifier stage being provided having an input coupled to said input terminal and an output coupled to the input of the output amplifier stage of the cascade; and said third capacitor functioning as a negative feedback circuit between the first and third amplifier stages.

Claim 33

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and the second amplifier stage being devoid of a capacitor between its output and input.

Claim 34

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and the second amplifier stage being devoid of a capacitor between its output and input.

Claim 35

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and the cascade connection including third, second and first amplifier stages, in the order named, between the input and output terminals.

Claim 36

A multistage amplifier circuit with frequency compensation comprising: an input terminal and an output terminal; first, second, third and fourth amplifier stages connected in cascade, each amplifier stage having an input and an output; a first capacitor coupled between the output and input of the first amplifier stage; a second capacitor coupled between the output and input of the third amplifier stage; a third capacitor coupled between the output of the first amplifier stage and the input of the third amplifier stage; means for coupling said input terminal and said output terminal to the input and the output of the amplifier stages comprising the first and last amplifier stages of the cascade, respectively; and wherein said first, second and third amplifier stages comprise inverting stages; and the cascade connection including third, second and first amplifier stages, in the order named, between the input and output terminals.